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PDF AK7707 Data sheet ( Hoja de datos )
| Número de pieza | AK7707 | |
| Descripción | Multi Core DSP | |
| Fabricantes | AKM | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AK7707 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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[AK7707]
AK7707
Multi Core DSP with SRC
1. General Description
The AK7707 is a highly integrated digital signal processor, including 6 stereo sampling rate convertors
supporting sampling frequency up to 192kHz, a DIR, a DIT and two types of DSPs for Audio and Voice
processing. The DSP1 supports a 295MHz core and is optimized for C-language support. DSP2 and
DSP3 have 4608 step/fs (when fs=48kHz) processing power. The AK7707 is able to process multiple
sample rates simultaneously. This function is ideal for full bandwidth audio and voice processing, such
as hands-free function along with audio. This simultaneous processing is enabled because the two
types of DSPs can work on different but synchronized sampling frequencies. The AK7707 is a RAM
based DSP, so it can be freely programmed for user requirements, such as acoustic effects and
proprietary high performance hands-free function. The AK7707 is available in a space saving 64-pin
HTQFP package.
2. Features
DSP1(Tensilica Hifi2):
- Word Length:
64-bit
- Operation Clock:
294.912MHz (DSP1 Fast Mode)
- IRAM:
128KB
- DRAM:
384KB
- GPIO:
8 ports
- SPI Control Master Port x 1
- JTAG for On-chip Debugging
- Independent Power Management
DSP2, 3(AKM DSP)
- Word Length:
28-bit (Data RAM: Simple floating point)
- Operation Clock
221.184MHz (4608steps, fs= 48kHz, DSP2/3 Fast Mode)
- Multiplier:
24 x 24 → 48-bit (Double precision arithmetic available)
- Divider:
24 / 24 → 24-bit (Floating point normalization function)
- ALU:
52-bit Arithmetic Operation (with overflow margin 4-bit)
- Program RAM (PRAM): 10kword x 36-bit (DSP2+DSP3 Total)
- Coefficient RAM (CRAM): 10kword x 24-bit (DSP2+DSP3 Total)
- Data RAM (DRAM):
10kword x 28-bit (DSP2+DSP3 Total)
- Delay RAM(DLRAM): 24kword x 28-bit (DSP2+DSP3 Total)
- JX pins (Interrupt)
- Independent Power Management Function
SRC
- 2ch x 6
- FSI = 8kHz ~ 192kHz, FSO= 8kHz ~ 192kHz (FSO/FSI= 0.167 ~ 6.0)
016011589-E-00-PB
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1 page  
■ DSP1 Block Diagram
Master-SPI
Slave-SPI
Audio-Bus
Status
24-bit
Watchdog Timer
32-bit
Master-SPI I/O Buffer
256-bit
Slave-SPI I/O Buffer
2KB
Audio I/O Buffer 1/2
2KB
[AK7707]
DSP1
(Hifi2)
Core
Interrupt
GPIO
JTAG
IRAM0
128KB
Slave-SPI
DRAM0
128KB
Slave-SPI
DRAM1
256KB
Slave-SPI
Figure 2. DSP1 Block Diagram
016011589-E-00-PB
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[AK7707]
No. Pin Name I/O Function
Supply
49 XTO
50 XTI
51 AVDD
52 VSS5
53 TESTA1
54 TESTA2
55 TESTI2
56 RX0
Oscillation Circuit Output
O
• When using crystal oscillator, the XTI and the XTO pins
should be connected to a crystal oscillator.
• When not using crystal oscillator, this pin should be open.
Oscillation Circuit Input
• When using crystal oscillator, the XTI and the XTO pins
I should be connected to a crystal oscillator.
• When not using crystal oscillator, this pin should be
connected to external clock or VSS5.
- Analog Power Supply Typ. 3.3V (3.13V ~ 3.47V)
- Ground 5 0V
I/O Test In/Output (This pin must be open)
I/O Test In/Output (This pin must be open)
I
Test Input 2 (Pulled-down)
Connect this pin to VSS6.
I DIR Data Input 0
AVDD
AVDD
-
-
AVDD
AVDD
VDD33
VDD33
57 VSS6
- Ground 6 0V
-
58 VDD33
- Digital Power Supply 33 Typ. 3.3V (3.13V ~ 3.47V)
-
59
SDIN6
RX1
I Serial Data Input 6
I DIR Data Input 1
VDD33
60
TRST
JX0
I JTAG Input
I JX Input 0 (DSP2/3-JX0)
VDD33
61
TCK
JX1
I JTAG Input
I JX Input 1 (DSP2/3-JX1)
VDD33
62
TDO
GPO1
O JTAG Out
O General Output 1 (DSP2-GP1)
VDD33
63
TMS
JX2
I JTAG Input
I JX Input 2 (DSP2/3-JX2)
VDD33
64
TDI
JX3
I JTAG Input
I JX Input 3 (DSP2/3-JX3)
VDD33
* The exposed pad on the bottom surface of the package must be connected to the ground to reduce the
need for heat-sinking.
016011589-E-00-PB
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2016/11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK7707.PDF ] | |
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