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PDF CDM6116A Data sheet ( Hoja de datos )

Número de pieza CDM6116A
Descripción CMOS 2048-Word by 8-Bit Static RAM
Fabricantes GE 
Logotipo GE Logotipo



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No Preview Available ! CDM6116A Hoja de datos, Descripción, Manual

Random-Acee.. Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDM6116A
Product Preview
A7 24 Vee
AS 23 A8
A5 3
A4 4
22 A9
21 WE
A3 20 OE
A2 S
AI 7
19 AIO
18 CE
AO 8
17 :t/08
:t/01
9
16 I107
:t/02
10
15 :1:/06
:t/03
II
14 :t/05
vss 12
13 I104
TOP VIEW
92CS-36942
TERMINAL ASSIGNMENT
CMOS 2048-Word by 8-Bit
Static RAM
Features:
• Fully static operation
• Single power supply: 4.5 Vt05.5 V
• All inputs and outputs directly TTL compatible
• 3-state outputs
• Industry standard 24-pin configuration
• Chip-enable gates address buffers for minimum standby current
• Data retention voltage: 2 V min.
The RCA-COM6116A Is a CMOS 2048-word by 8-bit static
random-access memory. It is designed for use in memory
systems where high-speed, low power and simplicity In use
are desirable. This device has common data inputs and data
outputs and utilizes aslngle power supply of 4.5 V to 5.5 V. A
chip-enable Input and an output-enable input are provided
for memory expansion and output buffer control.
The chip enable (CE) gates the address and output buffers
and powers down the chip to the low power standby mode.
The output enable (CE) controls the output buffers to
eliminate bus contention.
The COM6116A-2 and COM6116A-3 are supplied in a 24-
lead dual-In-line plastic package (E suffix). The COM-
6116A-9lssupplied in a 24-lead dual-in-line plastic package
(E suffix) and a 24-lead dual-in-line side-brazed ceramic
package (0 suffix).
Access Time (max.)
Output Enable Time (max.)
Operating Temperature
Operating Current (max.)
Standby Current
loos, (max.)
CDM6116A-2ICDM6116A-3 CDM6116A-9
200 ns I 150 ns
250 ns
120 ns I 60 ns
150 ns
0° to +70°C
40° to +85° C
35 mA I 35mA
40mA
I30llA
50llA
100 llA
OPERATING CONDITIONS at TA = 0 to +70·C, (CDM6116A-2, CDM6116A-3); TA = _40° to +85°C (CDM6116A-9)
For maximum reliability, operating conditions should be lelected so that operation Is always within the following ranges:
CHARACTERISTIC
DC Operating Voltage Range
Input Voltage Range
Input Signal Rise or Fall Time I:J.
LIMITS
ALL TYPES
MIN.
MAX.
4.5 5.5
V'H 2.2 Voo + 0.3
V'L -0.3
-tr,t,
0.8
5
A Input signal rise and fall tim8s longer than the maximum value can cause loss of stored data in the selected mode.
UNITS
V
JIS
File Number 1472
636 __________________________________________

1 page




CDM6116A pdf
R.ndom-Acc. . ___________M.mo~.8(RAM8)·~ ____________________________
CDM6116A
WRITE CYCLE 1
ADDRESS
~--------IWC----------------~
f4----1 cw - - - - -.....---.:~
DATA OUT
DATA IN
f4---- lwp -----l
- + _t -I.:D::.W::
1DH
WRITE CYCLE 2 • OE =LOW
f4------I~------~
1'-----------------~
ADDRESS
DATA OUT
DATA IN
TIMING MEASUREMENT REFERENCE
LEVEL IS 1.5V
92CII- 56945
Fig. 3 - Write-cycle timing waveforms.
_______________________________________________________________
6~

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