|
|
PDF TMM27256ADI-20 Data sheet ( Hoja de datos )
| Número de pieza | TMM27256ADI-20 | |
| Descripción | N-MOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY | |
| Fabricantes | Toshiba | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de TMM27256ADI-20 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
TOSHIBA MOS MEMORY PRODUCT
32,768 WORD X 8 BIT N·MOS UV ERASABLE AND
ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY
SILICON STACKED GATE MOS
TMM27256ADI-15
TMM27256ADI-20
DESCRIPTION
The TMM27256ADI is a 32,768 word x 8 bit
ultraviolet light erasable and electrically program·
mabie read only memory.
For read operation, The TMM27256ADI's access
time is 150ns/200ns, and the TMM27256ADI oper-
ates from a single 5-volt power supply and has low
power standby mode which reduces the power dis-
sipation without increasing access time. The standby
mode is achieved by applying a TIL-high level signal
to the CE input.
For program operation, the programming is
achieved by using the high speed programming
mode.
The TMM27256ADI is fabricated with the N-chan-
nel silicon double layer gate MaS technology.
FEATURES
Vee
tAee
1eC2
lee 1
-15
150ns
I
5V±5%
I
100mA
30mA
'-
-20
200ns
• Wide operating temparature range -40-85°C
• Full static operation
• High speed programming mode
• Inputs and outputs TTL compatible
• Pin compatible with i27256
• Standard 28 pin DIP cerdip package
PIN CONNECTION (TOP VIEW)
Vee
AU
Al3
AS
A5 A9
A4 All
A3 DE
A2 AIO
BE
07
00 06
01 05
02 04
OND 03
BLOCK DIAGRAM
Vpp OND Vee
00 01 0203 O. 05 06 07
AO
Al
A2
~:!
A4
A5
A6
A7
AS
A9
AlO
All
A12
AI:!
Al4
PIN NAMES
MODE SELECTION
AO-'A14
00-07
CE
OE
Vpp
Vee
GND
Address Inputs
Outputs (Inputs)
Chip Enable Input
Output Enable Input
Program Supply Voltage
Vee Supply Voltage (+ 5V)
Ground
~MODE
CE
(20)
Read
L
Output
Deselect
*
Standby
H
Program
L
Program
Inhibit
H
Program
Verify
*
* .Note H or L
OE Vpp Vee
(22) (1) (28)
L
H 5V 5V
*
H
* 12.5V 6V
L
00-07
(11-13,15-19)
Data Out
High Impedance
High Impedance
Data In
High Impedance
Data Out
POWER
Active
Standby
Active
- 0-57 -
1 page  
TMM27256ADI-15
TMM27256ADI-20
ERASURE CHARACTERISTICS
The TMM27256ADI's erasure is achieved byapply-
ing shortwave ultraviolet light which has a wave-
length of 2537A (Angstroms) of the chip through the
transparent window.
The integrated dose (ultraviolet light intensity
[w/cm2] X exposure time [sec.]) for erasure should be
a minimum of 15 [w· sec/cm2]
When the Toshiba GL-15 sterilizing lamp is used
and the device is exposed at a distance of 1cm from
the lamp surface, the erasure will be achieved within
60 minutes.
OPERATION INFORMATION
The TMM27256ADI's six operation modes are list-
ed In the following table. Mode selection can be
And using commercial lamps with an ultraviolet light
intensity of 12000 [p.w/cm2] will reduce the exposure
time to about 20 minutes. (In this case, the integrated
dose is 12000 _[p.w/cm2] X (20X60) [sec] ~ 15
[w· sec/cm2] .)
The TMM27256ADI's erasure begins to occur when
exposed to light with wavelengths shorter than 4000A.
Both Sunlight and flourescent lamps include
3000-4000A wavelength components. Therefore
when used under such lighting for extended periods
of time, opaque seals-Toshiba EPROM Protect Seal
AC901-are available
achieved by applYing TIL level signal to all inputs.
---~R) CE
OE
Vpp
Vee
00-07
MODE
(20) (22)
(1)
(28)
(11-13.15-19)
POWER
Read Operation
(Ta= -40-85"C)
Read
Output Deselect
Standby
Program Operation
(Ta=25±5'C)
Program
Program Inhibit
Program Verify
* :Note H : VIH, L : VIL,
VIH or VIL
LL
Data Out
* H 5 V 5V High Impedance
H*
High Impedance
LH
Data In
*H 12.5V 6V High Impedance
*L
Data Out
Active
Active
Standby
~tive
i Active
---
Active
READ MODE
The TMM27256ADI has two control functions.
The chip enable (CE) controls the operation power
and should be used for device selection.
The output enable (OE) controls the output buffers,
independent of device selection.
Assuming that CE=OE=VIL, the output data is valid
at the outputs after the address access time from
stabilizing of all addressess.
The CE to output valid (tCE) time is equal to the
address access time (tACe).
Assuming that CE=VI L and all addresses are valid,
the output data is valid at the outputs after tOE from
the falling edge of CEo
OUTPUT DESELECT MODE
With CE=VI H or OE=VI H, outputs will be in high
impedance state.
Therefore two or more TM M27256ADI's can be con-
nected together on a common bus line.
When CE is decoded for device selection, all
deselected devices are in low power standby mode.
- 0-61 -
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet TMM27256ADI-20.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TMM27256ADI-20 | N-MOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY | Toshiba |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |