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PDF FQB34P10 Data sheet ( Hoja de datos )

Número de pieza FQB34P10
Descripción MOSFET ( Transistor )
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FQB34P10
P-Channel QFET® MOSFET
100 V, -33.5 A, 60 mΩ
March 2016
Description
This P-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
resistance, and to provide superior switching performance
and high avalanche energy strength. These devices are
suitable for switched mode power supplies, audio amplifier,
DC motor control, and variable switching power applications.
Features
-33.5 A, -100 V, RDS(on) = 60 m(Max.) @ VGS = .10 V,
ID = -16.75 A
• Low Gate Charge (Typ. 85 nC)
• Low Crss (Typ. 170 pF)
• 100% Avalanche Tested
175°C Maximum Junction Temperature Rating
S
G
S
D
D2-PAK
G
D
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering,
1/8" from case for 5 seconds
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
FQB34P10TM
-100
-33.5
-23.5
-134
± 25
2200
-33.5
15.5
-6.0
3.75
155
1.03
-55 to +175
300
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RJC
RJA
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max.
Thermal Resistance, Junction to Ambient (*1 in2 Pad of 2-oz Copper), Max.
FQB34P10TM
0.97
62.5
40
Unit
oC/W
©2000 Fairchild Semiconductor Corporation
FQB34P10 Rev. 1.4
1
www.fairchildsemi.com

1 page




FQB34P10 pdf
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
Qg
VGS
VDS
Qgs Qgd
IG = const.
DUT
Charge
Figure 12. Gate Charge Test Circuit & Waveform
VDS
VGS
RG
RL
VDD
td(on)
VGS 10%
t on
tr
t off
td(off)
tf
VGS
DUT
VDS
90%
Figure 13. Resistive Switching Test Circuit & Waveforms
L
VDS
EAS = --21-- L IAS2
BVDSS
--------------------
BVDSS - VDD
t p Time
ID
VGS
tp
RG
DUT
VDD
VDD
IAS
BVDSS
ID (t)
VDS (t)
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2000 Fairchild Semiconductor Corporation
FQB34P10 Rev. 1.4
5
www.fairchildsemi.com

5 Page










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