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PDF AS4SD8M16 Data sheet ( Hoja de datos )
| Número de pieza | AS4SD8M16 | |
| Descripción | 128 Mb: 8 Meg x 16 SDRAM | |
| Fabricantes | Micross | |
| Logotipo |  |
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SDRAM
AS4SD8M16
128 Mb: 8 Meg x 16 SDRAM
Synchronous DRAM Memory
FEATURES
• Full Military temp (-55°C to 125°C) processing available
• Configuration: 8 Meg x 16 (2 Meg x 16 x 4 banks)
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal pipelined operation; column address can be
changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8 or full page
• Auto Precharge, includes CONCURRENT AUTO
PRECHARGE and Auto Refresh Modes
• Self Refresh Mode (IT & ET)
• 64ms, 4,096-cycle refresh (IT)
• 24ms 4,096 cycle recfresh (XT)
• WRITE Recovery (tWR = “2 CLK”)
• LVTTL-compatible inputs and outputs
• Single +3.3V ±0.3V power supply
OPTIONS
• Plastic Package
54-pin TSOPII (400 mil)
(Pb/Sn finish or RoHS available)
MARKING
DG No. 901
• Timing (Cycle Time)
7.5ns @ CL = 3 (PC133) or
10ns @ CL = 2 (PC100)
-75
• Operating Temperature Ranges
-Industrial Temp (-40°C to 85° C)
-Enhanced Temp (-40°C to +105°C)
-Military Temp (-55°C to 125°C)
IT
ET
XT
KEY TIMING PARAMETERS
SPEED CLOCK
ACCESS TIME
GRADE FREQUENCY CL = 2** CL = 3**
-75 133 MHz
– 5.4ns
-75 100 MHz 6ns
–
*Off-center parting line
**CL = CAS (READ) latency
SETUP
TIME
1.5ns
1.5ns
HOLD
TIME
0.8ns
0.8ns
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
VDD
DQML
WE\
CAS\
RAS\
CS\
BA0
BA1
A10
A0
A1
A2
A3
VDD
PIN ASSIGNMENT
(Top View)
54-Pin TSOP
1 54
2 53
3 52
4 51
5 50
6 49
7 48
8 47
9 46
10 45
11 44
12 43
13 42
14 41
15 40
16 39
17 38
18 37
19 36
20 35
21 34
22 33
23 32
24 31
25 30
26 29
27 28
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
VSS
NC
DQMH
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
Vss
Package may or may not be
assembled with a location notch.
8 Meg x 16
Configuration
2 Meg x 16 x 4 banks
Refresh Count
4K
Row Addressing
4K (A0-A11)
Bank Addressing
4 (BA0, BA1)
Column Addressing
512 (A0-A8)
Note: “\” indicates an active low.
For more products and information
please visit our web site at www.micross.com
AS4SD8M16
Rev. 1.6 March 27, 2015
Micross Components reserves the right to change products or specifications without notice.
1
1 page  
SDRAM
AS4SD8M16
FIGURE 1: Mode Register Definition
TABLE 1: Burst Definition
BURST
LENGTH
2
4
8
Full
Page
(y)
STARTING ORDER OF ACCESSES WITHIN A BURST
COLUMN TYPE = SEQUENTIAL TYPE = INTERLEAVED
A0
0 0-1
0-1
1
A1 A0
1-0
1-0
00
0-1-2-3
0-1-2-3
01
1-2-3-0
1-0-3-2
10
2-3-0-1
2-3-0-1
11
A2 A1 A0
3-0-1-2
3-2-1-0
0 0 0 0-1-2-3-4-5-6-7
0-1-2-3-4-5-6-7
0 0 1 1-2-3-4-5-6-7-0
1-0-3-2-5-4-7-6
0 1 0 2-3-4-5-6-7-0-1-
2-3-0-1-6-7-4-5
0 1 1 3-4-5-6-7-0-1-2
3-2-1-0-7-6-5-4
100
101
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
1 1 0 6-7-0-1-2-3-4-5
6-7-4-5-2-3-0-1
1 1 1 7-0-1-2-3-4-5-6
7-6-5-4-3-2-1-0
Cn, Cn+1, Cn+2, Cn+3,
n=A0-A8
Cn+4…
(location 0-y)
…Cn-1,
Not Supported
Cn…
NOTES:
1. For full-page access: y=512
2. For a burst length of two, A1-A8 select the block-of-two burst;
A0 selects the starting column within the block.
3. For a burst length of four, A2-A8 select the block-of-four burst;
A0-A1 selects the starting column within the block.
4. For a burst length of eight, A3-A8 select the block-of-eight burst; A0-A2
selects the starting column within the block.
5. For a full-page burst, the full row is selected and A0-A8 select the starting
column.
6. Whenever a boundary of the block is reached within a given sequence
above, the following access wraps within the block.
7. For a burst length of one, A0-A8 select the unique column to be accessed,
and mode register bit M3 is ignored.
AS4SD8M16
Rev. 1.6 March 27, 2015
Micross Components reserves the right to change products or specifications without notice.
5
5 Page 
FIGURE 7: Consecutive READ Bursts
SDRAM
AS4SD8M16
AS4SD8M16
Rev. 1.6 March 27, 2015
11
Micross Components reserves the right to change products or specifications without notice.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AS4SD8M16.PDF ] | |
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