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PDF MPC89L556X2 Data sheet ( Hoja de datos )
| Número de pieza | MPC89L556X2 | |
| Descripción | 8-Bit Micro-controller | |
| Fabricantes | Megawin Technology | |
| Logotipo |  |
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MPC89L556X2
8-Bit Micro-controller
Features
● 8-bit 80C52-compatible Microcontroller
− Fully instruction set compatible
− Pin-to-pin package compatible with standard 80C52
● Power voltage range: VCC= 2.4V ~ 3.6V
● Optional 12 clocks or 6 clocks per machine cycles operation
● Operating speed: Up to 45MHz for both 12 clocks and 6 clocks per machine cycle
● Memory architecture
− 512 bytes on-chip RAM
− 64K bytes on-chip flash memory
− 64K bytes program and data memory address spaces
− Provides In-system programming (ISP) to update the program code
● 8 channels of an 8-bit A/D converter, shared with the port 1
● Four 8-bit bi-directional I/O Ports (P0, P1, P2, P3) and P4.0~P4.3, and except P1 is not 5V-
tolerant, P0/2/3/4 all are 5V-tolerant
● Three 16-bit programmable timer/counters, Timer2 is an up/down counter with programmable
clock output on P1.0
● One watchdog timer
● One enhanced UART, provides frame-error detection and hardware address- recognition
● Power saving mode
− Idle and Power-down modes
− Waking up the power-down mode by P3.2 and P3.3
● Dual DPTR for fast-moving external data memory
● 6-source and 4-level interrupt structure
● Inhibit ALE-signal output for the low EMI
● 3-level code protection
● Packages:
− PDIP 40: MPC89L556X2
− PLCC 44: MPC89L556X2P
− PQFP 44: MPC89L556X2F
This document contains information on a new product under development by Megawin. Megawin reserves the right to change or discontinue this
product without notice.
Megawin Technology Co., Ltd. 1999 All right reserved.
2004/10 version A1
MEGAWIN
1 page  
Special Function Registers
SYMBOL DESCRIPTION ADDRESS
MSB
BIT ADDRESS AND SYMBOL
LSB
INITAL
VALUE
+ P0
Port 0
SP
DPL
DPH
PCON
Stack Pointer
Data Pointer Low
Data Pointer High
Power Control
87H 86H 85H 84H 83H 82H 81H 80H
80H 11111111B
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
81H 00000111B
82H 00000000B
83H 00000000B
87H SMOD -
- POF GF1 GF0 PD IDL 00XX0000B
+ TCON Timer Control
TMOD
TL0
TL1
TH0
TH1
AUXR
Timer Mode
Timer Low 0
Timer Low 1
Timer High 0
Timer High 1
Auxiliary
88H
89H
8AH
8BH
8CH
8DH
8EH
9FH
TF1
GATE
-
9EH
TR1
C/-T
9DH
TF0
M1
--
9CH
TR0
M0
9BH
IE1
GATE
9AH
IT1
C/-T
89H
IE0
M1
88H
IT0
M0
- - - - AO
00000000B
00000000B
00000000B
00000000B
00000000B
00000000B
XXXXXXX0B
+ P1
Port 1
P1SFAD Port 1 Special Function
90H
97H
97H
-
EAI7
96H
-
EAI6
95H
-
EAI5
94H
-
EAI4
93H
-
EAI3
92H 91H 90H
- T2EX T2
EAI2 EAI1 EAI0
11111111B
00000000B
+ SCON Serial Control
SBUF Serial Data Buffer
9FH 9EH 9DH 9CH 9BH 9AH 99H 98H
98H 00000000B
SM0/FE SM1 SM2 REN TB8 RB8 TI RI
99H XXXXXXXXB
+ P2
Port 2
AUXR1 Auxiliary 1
A7H A6H A5H A4H A3H A2H A1H A0H
A0H 11111111B
A15 A14 A13 A12 A11 A10 A9 A8
A2H - - - - - - - DPS XXXXXXX0B
+ IE
Interrupt Enable
SADDR Slave Address
AFH AEH ADH ACH ABH AAH A9H A8H
A8H 00000000B
EA EAD ET2 ES ET1 EX1 ET0 EX0
A9H 00000000B
+ P3
IPH
Port 3
Interrupt Priority High
B0H
B7H
B7H
-RD
-
B6H
-WR
-
B5H
T1
PT2H
B4H
T0
PSH
B3H
-INT1
PT1H
B2H B1H B0H
-INT0 TXD RXD
PX1H PT0H PX0H
11111111B
X0000000B
+ IP
Interrupt Priority
SADEN Slave Address Mask
B8H BFH BEH BDH BCH BBH BAH B9H B8H X0000000B
- PAD PT2 PS PT1 PX1 PT0 PX0
B9H 00000000B
+ P4
Port 4
C0H
C7H
-
C6H
-
C5H
-
C4H
-
C3H
P4.3
C2H C1H C0H
P4.2 P4.1 P4.0
XXXXXX11B
MEGAWIN
MPC89L556X2 Technical Summary
5
5 Page 
IPH (Interrupt Priority High register, Address: 0B7H)
- - PT2H PSH PT1H
PX1H
PT0H
LSB
PX0H
● PT2H: PT2H=1 sets the Timer 2 to higher priority level.
● PSH: PSH=1 sets the serial port to higher priority level.
● PT1H: PT1H=1 sets the Timer 1 to higher priority level.
● PX1H: PX1H=1 sets the external interrupt 1 to higher priority level.
● PT0H: PT0H=1 sets the Timer 0 to higher priority level.
● PX0H: PX0H=1 sets the external interrupt 0 to higher priority level.
There are three SFRs (IE, IP and IPH) to form the 4-level priority interrupt. The priority of each interrupt
is determined as the following table:
Interrupt Priority Level Table
IPH IP Interrupt Priority Level
1 1 Level 3(Highest)
1 0 Level 2
0 1 Level 1
0 0 Level 0 (Lowest)
I/O Ports
MPC89L556X2ís port structure has the same I/O ports as the standard 80C52, and an expanded bit-
addressable port 4. The address of the port 4 is 0C0H. The port 4 has only 4 pins (P4.0 ~ P4.3), and is
also available on 44-pin PLCC and 44-pin PQFP. Therefore, only four bits (P4<3:0>) in the P4 SFR
can be used. In additional, the port 1 pins are also shared with the 8-bit A/D converter inputs
(ADC0~ADC7).
Analog-to-Digital-Converter (ADC)
The ADC on MPC89L556X2 is an 8-bit resolution, successive-approximation approach, medium-speed
A/D converter. VREFP/VREFM is the positive/negative reference voltage input for internal voltage-scaling
DAC use, the typical sink current on it is 600uA ~ 1mA. For MPC89L556X2, these two references are
internally tied to VDD and GND, separately.
Conversion is invoked since ADCS bit is set. The converter takes around 7.5 machine cycles to
sample analog input data and extra 9.5 machine cycles is needed in successive-approximation steps.
Total conversion time is 17 machine cycles, which no matter what system clock is. Analog input source
comes from Port1 with the corresponding P1SFAD bits set. One of the eight-channels is multiplexed by
analog multiplexer into the comparator. When conversion is completed, the result will be saved onto
ADC register if and only if ADCI is not set. After the result are loaded onto ADC register, ADCI will be
set and generate interrupt. ADCI should be cleared by software, not be automatically cleared by
hardware. The ADCís interrupt vectors to a ROM space address, #33H.
MEGAWIN
MPC89L556X2 Technical Summary
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet MPC89L556X2.PDF ] | |
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