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Número de pieza | AT88SC153 | |
Descripción | Secure Memory | |
Fabricantes | ATMEL Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AT88SC153 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
No Preview Available ! Features
• One 64 x 8 (512-bit) Configuration Zone
• Three 64 x 8 (512-bit) User Zones
• Programmable Chip Select
• Low-voltage Operation: 2.7V to 5.5V
• Two-wire Serial Interface
• 8-byte Page Write Mode
• Self-timed Write Cycle (10 ms max)
• Answer-to-reset Register
• High-security Memory Including Anti-wiretapping
– 64-bit Authentication Protocol (under exclusive patent license from ELVA)
– Secure Checksum
– Configurable Authentication Attempts Counter
– Two Sets of Two 24-bit Passwords
– Specific Passwords for Read and Write
– Four Password Attempts Counters
– Selectable Access Rights by Zone
• ISO Compliant Packaging
• High Reliability
– Endurance: 100,000 Cycles
– Data Retention: 100 Years
– ESD Protection: 4,000V min
• Low-power CMOS
3 x 64 x 8
Secure Memory
with
Authentication
AT88SC153
Table 0-1.
Name
VCC
GND
SCL
SDA
RST
Pin Configuration
Description
Supply Voltage
Ground
Serial Clock Input
Serial Data
Input/Output
Reset Input
ISO Module Contact
C1
C5
C3
C7
C2
Standard Package Pin
8
1
6
3
7
Figure 0-1. Card Module Contact
VCC
RST
1016E-SMEM-12/07
1 page AT88SC153
5. Fuses
FAB, CMA, and PER are nonvolatile fuses blown at the end of each card life step. Once blown,
these EEPROM fuses can not be reset.
• The FAB fuse is blown by Atmel prior to shipping wafers to the card manufacturer.
• The CMA fuse is blown by the card manufacturer prior to shipping cards to the issuer.
• The PER fuse is blown by the issuer prior to shipping cards to the end user.
The device responds to a read fuse command with fuse byte.
Table 5-1.
Bit 7
0
Fuse Byte
Bit 6
Bit 5
00
Bit 4
0
Bit 3
0
Bit 2
PER
Bit 1
CMA
Bit 0
FAB
When the fuses are all “1”s, read and write are allowed in the entire memory. Before blowing the
FAB fuse, Atmel writes the entire memory to “1” and programs the fabrication subzone (except
CMC and AR) and the secure code.
Table 5-2. Access Rights
Zone
Fabrication
(Except CMC, MTZ and AR)
Card Manufacturer
Code
Access Registers
Memory Test Zone
Identification
Secret
Passwords
PAC
User Zones
Access
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
Write
FAB = 0
Free
Forbidden
Free
Secure Code
Free
Secure Code
Free
Free
Free
Secure Code
Secure Code
Secure Code
Secure Code
Secure Code
Free
Secure Code
AR
AR
CMA = 0
Free
Forbidden
Free
Forbidden
Free
Secure Code
Free
Free
Free
Secure Code
Secure Code
Secure Code
Secure Code
Secure Code
Free
Secure Code
AR
AR
PER = 0
Free
Forbidden
Free
Forbidden
Free
Forbidden
Free
Free
Free
Forbidden
Forbidden
Forbidden
Write PW
Write PW
Free
Write PW
AR
AR
Note:
CMC: Card Manufacturer Code
AR: Access Rights as defined by the access registers
PW: Password
1016E–SMEM–12/07
5
5 Page 9.1 Read EEPROM
Figure 9-1. Read EEPROM
AT88SC153
Note: *don’t care bit
zz: Zone number
The data byte address is internally incremented following the transmission of each data byte.
During a read operation, the address “roll over” is from the last byte of the current zone to the
first byte of the same zone. If the host is not allowed to read at the specified address, the device
will transmit the corresponding data byte with all bits equal to “0”.
9.2 Write EEPROM
Figure 9-2. Write EEPROM
Note: *don’t care bit
zz: Zone number
The data byte address lower three bits are internally incremented following the receipt of each
data byte. The higher data byte address bits are not incremented, retaining the 8-byte write page
address. Each data byte within a page must only be loaded once. Once a stop condition is
issued to indicate the end of the host’s write operation, the device initiates the internal nonvola-
tile write cycle. An ACK polling sequence can be initiated immediately. After a write command, if
the host is not allowed to write at some address locations, a nonvolatile write cycle will still be ini-
tiated, but the device will only modify data at the allowed addresses. When write lock mode is
enabled (WLM = “0”), the write cycle is initiated automatically after the first data byte has been
transmitted.
1016E–SMEM–12/07
11
11 Page |
Páginas | Total 24 Páginas | |
PDF Descargar | [ Datasheet AT88SC153.PDF ] |
Número de pieza | Descripción | Fabricantes |
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