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PDF MC54HC534A Data sheet ( Hoja de datos )
| Número de pieza | MC54HC534A | |
| Descripción | OCTAL 3-STATE INVERTING D FLIP-FLOP | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC54HC534A (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State
Inverting D Flip-Flop
High–Performance Silicon–Gate CMOS
The MC54/74HC534A is identical in pinout to the LS534. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
Data meeting the setup time is clocked, in inverted form, to the outputs
with the rising edge of the Clock. The Output Enable input does not affect the
states of the flip–flops, but when Output Enable is high, the outputs are
forced to the high impedance state. Thus, data may be stored even when the
outputs are not enabled.
The HC534A is identical in function to the HC564 which has the data
inputs on the opposite side of the package from the outputs to facilitate PC
board layout.
This device is similar in function to the HC374A, which has noninverting
outputs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 282 FETs or 68.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 3
D1 4
D2 7
D3 8
D4 13
D5 14
D6 17
D7 18
CLOCK 11
2 Q0
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
INVERTING
OUTPUTS
OUTPUT ENABLE 1
PIN 20 = VCC
PIN 10 = GND
MC54/74HC534A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXADW
Ceramic
Plastic
SOIC
PIN ASSIGNMENT
OUTPUT
ENABLE
Q0
1
2
20 VCC
19 Q7
D0 3
18 D7
D1 4
17 D6
Q1 5
16 Q6
Q2 6
15 Q5
D2 7
14 D5
D3 8
13 D4
Q3 9
12 Q4
GND 10
11 CLOCK
FUNCTION TABLE
Inputs
Output
Output
Enable Clock
D
Q
L
L
L L,H,
HX
HL
LH
X No Change
XZ
X = Don’t Care
Z = High Impedance
10/95
© Motorola, Inc. 1995
3–1 REV 6
1 page  
MC54/74HC534A
20
1
A
F
H
D
SEATING
PLANE
–A–
20
1
–T–
SEATING
PLANE
E
GF
11
10
B
OUTLINE DIMENSIONS
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
ISSUE E
CL
N
K
G
J
M
NOTES:
1. LEADS WITHIN 0.25 (0.010) DIAMETER, TRUE
POSITION AT SEATING PLANE, AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONS A AND B INCLUDE MENISCUS.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 23.88 25.15 0.940 0.990
B 6.60 7.49 0.260 0.295
C 3.81 5.08 0.150 0.200
D 0.38 0.56 0.015 0.022
F 1.40 1.65 0.055 0.065
G 2.54 BSC
0.100 BSC
H 0.51 1.27 0.020 0.050
J 0.20 0.30 0.008 0.012
K 3.18 4.06 0.125 0.160
L 7.62 BSC
0.300 BSC
M 0_ 15_ 0_ 15_
N 0.25 1.02 0.010 0.040
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
11 ISSUE E
B
10
CL
K
N
D 20 PL
0.25 (0.010) M T A M
M
J 20 PL
0.25 (0.010) M
TBM
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 1.010 1.070 25.66 27.17
B 0.240 0.260 6.10 6.60
C 0.150 0.180 3.81 4.57
D 0.015 0.022 0.39 0.55
E 0.050 BSC
1.27 BSC
F 0.050 0.070 1.27 1.77
G 0.100 BSC
2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.140 2.80 3.55
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
DW SUFFIX
–A–
20 11
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
–B– 10X P
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
0.010 (0.25) M B M
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
1 10
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
20X D
0.010 (0.25) M T A S B S
J
F
18X G
C
–T–
SEATING
PLANE
K
M
R X 45_
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC
0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
High–Speed CMOS Logic Data
DL129 — Rev 6
3–5
MOTOROLA
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| PDF Descargar | [ Datasheet MC54HC534A.PDF ] | |
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