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PDF MC54HC251 Data sheet ( Hoja de datos )
| Número de pieza | MC54HC251 | |
| Descripción | 8-Input Data Selector/Multiplexer | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC54HC251 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8-Input Data Selector/
Multiplexer with
3-State Outputs
High–Performance Silicon–Gate CMOS
The MC54/74HC251 is identical in pinout to the LS251. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device selects one of the eight binary Data Inputs, as determined by
the Address Inputs. The Output Enable pin must be a low level for the
selected data to appear at the outputs. If Output Enable is high, both the Y
and the Y outputs are in the high–impedance state. This 3–state feature
allows the HC251 to be used in bus–oriented systems.
The HC251 is similar in function to the HC151 which does not have
3–state outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 134 FETs or 33.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 4
D1 3
D2 2
D3 1
D4 15
D5 14
D6 13
D7 12
ADDRESS
INPUTS
A0 11
A1 10
A2 9
OUTPUT ENABLE 7
PIN 16 = VCC
PIN 8 = GND
5Y
DATA
OUTPUTS
6Y
MC54/74HC251
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
D SUFFIX
SOIC PACKAGE
CASE 751B–05
ORDERING INFORMATION
MC54HCXXXJ
MC74HCXXXN
MC74HCXXXD
Ceramic
Plastic
SOIC
PIN ASSIGNMENT
D3 1
D2 2
16 VCC
15 D4
D1 3
14 D5
D0 4
13 D6
Y5
12 D7
Y
OUTPUT
ENABLE
GND
6
7
8
11 A0
10 A1
9 A2
FUNCTION TABLE
Inputs
Output
A2 A1 A0 Enable
X XX
L LL
L LH
L HL
L HH
HLL
H LH
HHL
H HH
H
L
L
L
L
L
L
L
L
Outputs
YY
ZZ
D0 D0
D1 D1
D2 D2
D3 D3
D4 D4
D5 D5
D6 D6
D7 D7
Z = high impedance
D0, D1, …, D7 = the level of the respective
D input.
10/95
© Motorola, Inc. 1995
1 REV 6
1 page  
D0 4
D1 3
D2 2
DATA
INPUTS
D3 1
D4 15
D5 14
D6 13
D7 12
A 11
B 10
C9
OUTPUT 7
ENABLE
EXPANDED LOGIC DIAGRAM
MC54/74HC251
5Y
DATA
6 Y OUTPUTS
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC54HC251.PDF ] | |
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