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PDF CYW20733 Data sheet ( Hoja de datos )
| Número de pieza | CYW20733 | |
| Descripción | Single-Chip Bluetooth Transceiver Wireless Input Devices | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CYW20733
Single-Chip Bluetooth Transceiver
Wireless Input Devices
The Cypress CYW20733 is a Bluetooth 3.0 + EDR compliant, stand-alone baseband processor with an integrated 2.4 GHz trans-
ceiver. The device is ideal for applications in wireless input devices including game controllers, keyboards, and joysticks. Built-in
firmware adheres to the Bluetooth Human Interface Device (HID) profile and Bluetooth Device ID profile specifications. The
CYW20733 radio has been designed to provide low power, low cost, and robust communications for applications operating in the
globally available 2.4 GHz unlicensed ISM band. It is fully compliant with the Bluetooth Radio Specification 3.0 + EDR. The single-
chip Bluetooth transceiver is a monolithic component implemented in a standard digital CMOS process and requires minimal exter-
nal components to make a fully compliant Bluetooth device. The CYW20733 is available in three package options: a 81-pin, 8 mm ×
8 mm FBGA, a 121-pin, 9 mm × 9 mm FBGA, and a 56-pin, 7 mm x 7 mm QFN.
Cypress Part Numbering Scheme
Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,
there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides
Cypress ordering part number that matches an existing IoT part number.
Table 1. Mapping Table for Part Number between Broadcom and Cypress
Broadcom Part Number
BCM20733
BCM20733A3KFB1G
BCM20733A3KFB2G
BCM20733A3KML1G
Cypress Part Number
CYW20733
CYW20733A3KFB1G
CYW20733A3KFB2G
CYW20733A3KML1G
Features
■ Integrated LDO to reduce BOM cost
■ Bluetooth specification 3.0 + EDR compatible
■ Bluetooth HID profile version 1.1 compliant
■ Bluetooth Device ID profile version 1.3 compliant
■ Supports AFH
■ Excellent receiver sensitivity
■ On-chip support for common keyboard and mouse inter-
faces eliminates external processor
■ Infrared (IR) modulator
■ IR learning
■ Integrated 200 mW filterless Class-D audio amplifier
■ Triac control
■ Triggered Broadcom Fast Connect
■ One I/O capable of sinking 100 mA for high- current drive
applications
■ Programmable key scan matrix interface, up to 8 × 20 key-
scanning matrix
■ Three-axis quadrature signal decoder
Applications
■ Game controllers
■ Wireless pointing devices: mice, trackballs
■ Wireless keyboards
■ Joysticks
■ On-chip support for serial peripheral interface (master and
slave modes)
■ Broadcom Serial Communications Interface (compatible
with Philips® I2C slaves)
■ Two independent half-duplex PCM/I2S interfaces
■ Real-time clock supported with 32.768 kHz oscillator
■ Programmable output power control meets Class 2 or
Class 3 requirements
■ On-chip PA with a maximum output power of +10dBm with-
out external component
■ Integrated ARM7TDMI-S™-based microprocessor core
■ On-chip power on reset (POR)
■ On-chip software control power management unit
■ Three package types available:
❐ 81-pin FBGA package (8 mm × 8 mm)
❐ 121-pin FBGA package (9 mm × 9 mm)
❐ 56-pin QFN package (7 mm x 7 mm)
■ RoHS compliant
■ Point-of-sale (POS) input devices
■ Remote controls
■ Home automation
■ 3D glasses
Cypress Semiconductor Corporation • 198 Champion Court
Document No. 002-14859 Rev. *R
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 21, 2016
1 page  
CYW20733
1.2 Microprocessor Unit
The CYW20733 microprocessor unit (µPU) runs software from the link control (LC) layer up to the Human Interface Device (HID). The
microprocessor is based on an ARM7™ 32-bit RISC processor with embedded ICE-RT debug and JTAG interface units. The µPU
has 320 KB of ROM for program storage and boot-up, 80 KB of RAM for scratch-pad data, and patch RAM code.
The internal boot ROM allows for flexibility during power-on reset to enable the same device to be used in various configurations,
including UART, and with an external serial EEPROM or with an external flash memory. At power-up, the lower layer protocol stack
is executed from the internal ROM memory.
External patches may be applied to the ROM-based firmware to provide flexibility for bug fixes and feature additions. The device can
also support the integration of user applications.
1.2.1 EEPROM Interface
The CYW20733 provides the BSC (Broadcom Serial Control) master interface; the BSC is programmed by the CPU to generate four
different types of BSC transfers on the bus: read-only, write-only, combined read/write, and combined write/read. BSC supports both
low-speed and fast mode devices. The BSC is compatible with a Philips® I2C slave device, except that master arbitration (multiple
I2C masters contending for the bus) is not supported. Native support for Microchip® 24LC128, Microchip 24AA128, and STMicroelec-
tronics® M24128-BR is included.
The EEPROM can contain customer application configuration information, including: application code, configuration data, patches,
pairing information, BD_ADDR, baud rate, SDP service record, and file system information used for code.
1.2.2 Serial Flash Interface
The CYW20733 includes an SPI master controller that can be used to access serial flash memory. The SPI master contains an AHB
slave interface, transmit and receive FIFOs, and the SPI core PHY logic.
Devices natively supported include the following:
■ Atmel® AT25BCM512B
■ MXIC MX25V512ZUI-20G
1.2.3 Internal Reset
The CYW20733 has an integrated power-on reset circuit that resets all circuits to a known power-on state.
Figure 1. Internal Reset Timing
VDDO POR delay
~ 2 ms
VDDO
VDDO POR
VDDC
VDDC POR
Baseband Reset
Crystal Enable
VDDO POR threshold
VDDC POR threshold
VDDC POR delay
~ 2 ms
Crystal
warm‐up
delay:
~ 5 ms
Start reading EEPROM and firmware boot.
Document No. 002-14859 Rev. *R
Page 5 of 67
5 Page 
CYW20733
Figure 4. Recommended Oscillator Configuration—12 pF Load Crystal
Table 5. Reference Crystal Electrical Specifications
Parameter
Input signal amplitude
Nominal frequency
Oscillation mode
Frequency tolerance
Tolerance stability over temp
Equivalent series resistance
Load capacitance
Operating temperature range
Storage temperature range
Drive level
Aging
Shunt capacitance
Conditions
–
–
–
@25°C
@0°C to +70°C
–
–
–
–
–
–
–
Min Typ
400 –
– 24.000
Fundamental
– ±10
– ±10
––
– 12
0–
–40 –
––
––
––
Max
2000
–
–
–
50
–
+70
+125
200
±10
2
Unit
mVp-p
MHz
–
ppm
ppm
Ω
pF
°C
°C
W
ppm/year
pF
HID Peripheral Block
The peripheral blocks of the CYW20733 all run from a single 128-kHz low-power RC oscillator. The oscillator can be turned on at the
request of any of the peripherals. If a peripheral is not enabled, it shall not assert its clock request line.
The keyboard scanner is a special case in that it may drop its clock request line even when enabled and then reassert the clock
request line if a key-press is detected.
Real-Time Clock and 32 kHz Crystal Oscillator
The CYW20733 has a 48-bit counter that can be configured to be clocked directly from a 32.768 kHz or 32.000 kHz crystal oscillator.
The real-time clock counter value is accessible via firmware.
Figure 5 shows the 32 kHz crystal (XTAL) oscillator with external components, and Table 6 lists the oscillator’s characteristics. It is a
standard Pierce oscillator using a comparator with hysteresis on the output to create a single-ended digital output. The hysteresis was
added to eliminate any chatter when the input is around the threshold of the comparator and is ~100 mV. This circuit can be operated
with a 32 kHz or 32.768 kHz crystal oscillator or be driven with a clock input at a similar frequency. The default component values are:
R1 = 10 M, C1 = C2 = ~10 pF. The values of C1 and C2 are used to fine-tune the oscillator.
Document No. 002-14859 Rev. *R
Page 11 of 67
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CYW20733.PDF ] | |
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