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PDF BU1S12S1AG-LB Data sheet ( Hoja de datos )
| Número de pieza | BU1S12S1AG-LB | |
| Descripción | Successive Approximation A/D Converter | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Datasheet
AD Converter Series
Successive Approximation A/D Converter
12bit, 0.5M to 1MSPS, 2.7 to 5.25V,
1-channel, SPITM Interface
BU1S12S1AG-LB
General Description
This is the product guarantees long time support in
Industrial market.
The BU1S12S1AG-LB is a general purpose, 12-bit
1-channel successive approximation AD converter. The
sampling rate of BU1S12S1AG-LB ranges from
0.5MSPS to 1MSPS.
Features
Long Time Support Product for Industrial Applications
Maximum 1MSPS Sampling Rate
Low Power Consumption
Small SSOP6 Package Compatible with SOT23-6
Serial Interface Compatible with
SPITM/QSPITM/MICROWIRETM
Operational Supply Voltage Range: 2.7V to 5.25V
Single-ended Input
Output Code in Straight Binary Format
Key Specifications
Supply Voltage Range:
2.7V to 5.25V
Sampling Rate:
0.5MSPS to 1MSPS
Power Consumption
In 1MSPS Operation:
INL:
8mW @VA=5V (Typ)
1.5mW @VA=3V (Typ)
-1.1 to +1.0 LSB
DNL:
-0.9 to +1.0 LSB
SNR:
71.5dB @ VA=3V (Typ)
SINAD:
71dB @ VA=3V (Typ)
Operational Temperature Range: -40°C to +105°C
Package
SSOP6
W(Typ) x D(Typ) x H(Max)
2.90mm x 2.80mm x 1.25mm
Applications
Industrial Equipment
Instrumentation and Control Systems
Motor Control Systems
Data Acquisition Systems
SSOP6
Figure 1. Package Outline
Typical Application Circuit
Figure 2 shows a typical application circuit of BU1S12S1AG-LB.
VOLTAGE
REFERENCE
10µF 0.1µF
ANALOG
SIGNAL
SOURCE
22Ω
1000pF
to 0.1µF
VA
CSB
BU1S12S1AG-LB
VIN
GND
SCLK
SDATA
330Ω
330Ω
100Ω
MICROPROCESSOR
or
DSP
Figure 2. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 14 • 001
〇This product has no designed protection against radioactive rays
1/16
TSZ02201-0GSG0GZ10180-1-2
04.Jul.2016 Rev.001
1 page  
BU1S12S1AG-LB
Timing Specifications
Unless otherwise specified, Ta=-40°C to +85°C (Typical: Ta=25°C), VA=2.7 to 5.25V, fSCLK=10 to 20MHz, CL=25pF
Parameter
Conversion Time
CSB Pulse Width
CSB Setup Time
SDATA Enable Time
SDATA Access Time 1
SDATA Access Time 2
SCLK Low Pulse Width
SCLK High Pulse Width
SDATA Hold Time 1
SDATA Hold Time 2
SDATA Disable Time 1
SDATA Disable Time 2
CSB Hold Time
SCLK Setup Time
Quiet Time
Power-Up Time
Throughput Period
Symbol
tCONV
t1
t2
t3
t4
t4
t5
t6
t7
t7
t8
t8
t9
t10
tQUIET
tPOWUP
tTHROUGHPUT
Min
-
10
10
-
-
-
0.4 x tSCLK
0.4 x tSCLK
7
5
6
5
10
10
50
-
1
Limits
Typ
16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
-
Max Unit
Condition
- SCLK
- ns
- ns
20 ns
40 ns VA=2.7 to 3.6V
20 ns VA=4.75 to 5.25V
- ns
- ns
- ns VA=2.7 to 3.6V
- ns VA=4.75 to 5.25V
25 ns VA=2.7 to 3.6V
25 ns VA=4.75 to 5.25V
- ns
- ns
- ns
- µs
20 µs
Hold mode
Track mode
CSB
SCLK
SDATA
t1
t9 tCONV
t2 1 2 3 4 t6 5
t10
13 14 15 16
t3 t4 t7 t5 t8
ZERO ZERO ZERO ZERO DB11 DB10
High-Z
4 LEADING ZEROS
DB2 DB1 DB0
tTHROUGHPUT
tQUIET
High-Z
(a) If SCLK is high at the falling edge of CSB
Hold mode
Track mode
CSB
SCLK
SDATA
t9 tCONV
t2 1 2 3 4 t6 5
t10
13 14 15 16
t3 t4 t7 t5 t8
High-Z
ZERO ZERO ZERO ZERO DB11 DB10
4 LEADING ZEROS
DB2 DB1 DB0
tTHROUGHPUT
t1
tQUIET
High-Z
(b) If SCLK is low at the falling edge of CSB
Figure 5. Serial Interface Timing Chart
(Note 1) When the BU1S12S1AG-LB is used at the sampling frequency of 1MSPS, it is recommended to hold SCLK
high at the falling edge of CSB as shown in Figure 5(a). (See also “3. Serial Interface” on page 10.)
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/16
TSZ02201-0GSG0GZ10180-1-2
04.Jul.2016 Rev.001
5 Page 
BU1S12S1AG-LB
4. Dummy Conversion
Dummy conversions are necessary in the following cases.
(1) A/D conversion after power-up
The first A/D conversion data after applying power to the BU1S12S1AG-LB is invalid. Therefore, a dummy
conversion is necessary after power-up before getting valid data. In addition, the power-up time is satisfied with a
cycle of the dummy conversion.
after power-up
CSB
SCLK
1
dummy conversion
16
1
16
SDATA
INVALID DATA
VALID DATA
Figure 22. A/D conversion after power-up
(2) A/D conversion after a stop period more than the maximum throughput time
The BU1S12S1AG-LB may stop performing A/D conversion between some A/D conversion cycles. If the maximum
limit of the throughput period of 20μsec is violated, the first A/D conversion data after the resumption is not valid
similar to the case after power-up. Therefore, a dummy conversion cycle is necessary when A/D conversions are
resumed after a stop period longer than the limit and the results later than the dummy conversion can be used
validly.
CSB
SCLK
SDATA
1
more than max throughput time
16
dummy conversion
1 16
1
VALID DATA
INVALID DATA
Figure 23. A/D conversion after a long suspension
VALID DATA
16
5. Pin Information
(1) Analog Input Pin
The equivalent analog input circuit is shown in Figure 24. The diodes, D1 and D2, are placed for ESD protection. If
the analog input voltage is more than “VA + 0.3V”, or less than “GND – 0.3V”, these diodes are turned on and
forward current is generated. This current might cause malfunction or irreversible damage to BU1S12S1AG-LB.
The capacitance value of the C1 in Figure 24 is typically 4pF, derived from the package parasitic capacitance. The
R1 is the resistance of the track/hold switch, typically 500Ω. The C2 is the sampling capacitance of
BU1S12S1AG-LB, and the capacitance value is typically 24pF.
VA
D1
R1
VIN
C1 D2
SW1
OPEN : HOLD MODE
CLOSE : TRACK MODE
C2
Figure 24. Analog Input Equivalent Circuit
(2) Digital Input and Output Pins
The equivalent digital input circuit is shown in Figure 25. Digital input pins, CSB and SCLK, don’t have any diodes
to VA. Thus, the maximum rating of “VA + 0.3V” is not applied to these digital input pins. Digital input voltage range
can vary from ground to 5.25V regardless of the supply voltage VA. This enables BU1S12S1AG-LB to be
interfaced with a wide range of logic levels, independent of the supply voltage VA.
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/16
TSZ02201-0GSG0GZ10180-1-2
04.Jul.2016 Rev.001
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet BU1S12S1AG-LB.PDF ] | |
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