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PDF MIC280 Data sheet ( Hoja de datos )
| Número de pieza | MIC280 | |
| Descripción | Thermal Supervisor | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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MIC280
Precision IttyBitty™ Thermal Supervisor
General Description
The MIC280 is a digital thermal supervisor capable of
measuring its own internal temperature and that of a
remote PN junction. The remote junction may be an
inexpensive commodity transistor—e.g., 2N3906—or an
embedded thermal diode such as those found in Intel
Pentium® II/III/IV CPUs, AMD Athlon® CPUs, and Xilinx
Virtex® FPGAs. A 2-wire SMBus® 2.0-compatible serial
interface is provided for host communication. Remote
temperature is measured with ±1°C accuracy and 9-bit to
12-bit resolution (programmable). Independent high, low,
and overtemperature thresholds are provided for each
zone.
The advanced integrating A/D converter and analog front-
end reduce errors due to noise for maximum accuracy and
minimum guardbanding. The interrupt output signals
temperature events to the host, including data-ready and
diode faults. Critical device settings can be locked to
prevent changes and ensure failsafe operation. The clock,
data, and interrupt pins are 5V-tolerant regardless of the
value of VDD. They will not clamp the bus lines low even if
the device is powered down. Superior accuracy, failsafe
operation, and small size make the MIC280 an excellent
choice for the most demanding thermal management
applications.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
Measures local and remote temperature
Highly accurate remote sensing: ±1°C max., 60°C to
100°C
Superior noise immunity for reduced temperature
guardbands
9-bit to 12-bit temperature resolution for remote zone
Fault queues to further reduce nuisance tripping
Programmable high, low, and overtemperature
thresholds for each zone
SMBus 2.0-compatible serial interface including device
timeout to prevent bus lockup
Voltage-tolerant I/Os
Open-drain interrupt output pin – supports SMBus Alert
Response Address protocol
Low power shutdown mode
Locking of critical functions to ensure failsafe operation
Failsafe response to diode faults
Enables ACPI-compliant thermal management
3.0V to 3.6V power supply range
Available in IttyBitty™ SOT23-6 package
Applications
Desktop, server, and notebook computers
Printers and copiers
Test and measurement equipment
Thermal supervision of Xilinx Virtex FPGAs
Wireless/RF systems
Intelligent power supplies
Datacom/telecom cards
Typical Application
IttyBitty is a trademark of Micrel, Inc. All other trademarks are the property of their respective owners.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
May 5, 2014
Revision 2.0
1 page  
Micrel, Inc.
MIC280
Electrical Characteristics(5, 6) (Continued)
VDD = 3.3V; TA = 25°C, unless noted. Bold values indicate –55°C ≤ TA ≤ +125°C, 3.0V ≤ VDD ≤ 3.6V, unless noted(3).
Symbol Parameter
Condition
Min. Typ. Max. Units
Serial Interface Timing
t1 CLK (clock) Period
2.5 µs
t2 Data In Setup Time to CLK High
t3 Data Out Stable after CLK Low
100 ns
300 ns
t4
Data Low Setup Time to CLK
Low
Start Condition
100 ns
t5
Data High Hold Time after CLK
High
Stop Condition
100 ns
tTO Bus Timeout
25 30 35 ms
Notes:
2. Exceeding the absolute maximum ratings may damage the device.
3. The device is not guaranteed to function outside its operating ratings. Final test on outgoing product is performed at TA = 25°C.
4. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF.
5. Specification for packaged product only.
6. Current into the /INT or DATA pins will result in self heating of the device. Sink current should be minimized for best accuracy.
7. Guaranteed by design over the operating temperature range. Not 100% production tested.
8. tINT and tCRIT are equal to tCONV.
9. TD is the temperature of the remote diode junction. Testing is performed using a single unit of one of the transistors listed in Table 8.
10. tCONV = tCONV(local) + tCONV(remote). Following the acquisition of either remote or local temperature data, the limit comparisons for that zone are
performed and the device status updated. Status bits will be set and /INT driven active, if applicable.
11. The interrupt reset propagation delay is dominated by the capacitance on the bus.
12. Accuracy specification does not include quantization noise, which may be up to ±1/2 LSB.
13. Tested at 10-bit resolution.
May 5, 2014 5 Revision 2.0
5 Page 
Micrel, Inc.
MIC280
Table 5. Digital Temperature Format, Low Bytes
Extended Temperature
Low Byte
0.0000
0.0625
0.1250
0.2500
0.5625
0.9375
9 BITS
Binary
0000 0000
0000 0000
0000 0000
0000 0000
1000 0000
1000 0000
10 BITS
Hex Binary
00 0000 0000
00 0000 0000
00 0000 0000
00 0100 0000
80 1000 0000
80 1100 0000
Resolution
11 Bits
Hex Binary
00 0000 0000
00 0000 0000
00 0010 0000
40 0100 0000
80 1000 0000
C0 1110 0000
12 BITS
Hex Binary
Hex
00 0000 0000
00
00 0001 0000
10
20 0010 0000
20
40 0100 0000
40
80 1001 0000
90
E0 1111 0000
F0
Interrupt Generation
There are eight different conditions that will cause the
MIC280 to set one of the bits in STATUS and assert its
/INT output, if so enabled. These conditions are listed in
Table 6. Unlike previous generations of thermal
supervisor ICs, there are no interdependencies between
any of these conditions. That is, if CONDITION is true,
the MIC280 will respond accordingly, regardless of any
previous or currently pending events.
Normally when a temperature event occurs, the
corresponding status bit will be set in STATUS, the
corresponding interrupt mask bit will be cleared, and /INT
will be asserted. Clearing the interrupt mask bit(s)
prohibits continuous interrupt generation while the device
is being serviced. It is possible to prevent events from
clearing interrupt mask bits by setting bits in the lock
register. See Table 7 for Lockbit functionality. A
temperature event will only set bits in the status register if
it is specifically enabled by the corresponding bit in the
interrupt mask register. An interrupt signal will only be
generated on /INT if interrupts are also globally enabled
(IE = 1 in CONFIG).
The MIC280 expects to be interrogated using the Alert
Response Address once it has asserted its interrupt
output. Following an interrupt, a successful response to
the A.R.A. or a read operation on STATUS will cause
/INT to be de-asserted. STATUS will also be cleared by
the read operation. Reading STATUS following an
interrupt is an acceptable substitute for using the A.R.A. if
the host system does not implement the A.R.A protocol.
Figure 4 and Figure 5 illustrate these two methods of
responding to MIC280 interrupts.
Because temperature-to-digital conversions continue
while /INT is asserted, the measured temperature could
change between the MIC280’s assertion of /INT and the
host’s response. It is good practice for the interrupt
service routine to read the value in TEMPx to verify that
the overtemperature or undertemperature condition still
exists. In addition, more than one temperature event may
have occurred simultaneously or in rapid succession
between the assertion of /INT and servicing of the
MIC280 by the host. The interrupt service routine should
allow for this eventuality. At the end of the interrupt
service routine, the interrupt enable bits should be reset
to permit future interrupts.
Reading the Result Registers
All MIC280 registers are eight bits wide and may be
accessed using the standard Read_Byte protocol. The
temperature result for the local zone, zone 0, is a single
8-bit value in register TEMP0. A single Read_Byte
operation by the host is sufficient for retrieving this value.
The temperature result for the remote zone is a twelve-bit
value split across two eight-bit registers, TEMP1h and
TEMP1l. A series of two Read_Byte operations are
needed to obtain the entire twelve-bit temperature result
for zone 1. It is possible under certain conditions that the
temperature result for zone 1 could be updated between
the time TEMP1l or TEMP1h is read and the companion
register is read. In order to ensure coherency, TEMP1h
supports the use of the Read_Word protocol for
accessing both TEMP1h and TEMP1l with a single
operation. This ensures that the values in both result
registers are from the same ADC cycle. This is illustrated
in Figure 3. Read_Word operations are only supported
for TEMP1h: TEMP1l, i.e., only for command byte values
of 01h.
Polling
The MIC280 may either be polled by the host or request
the host’s attention via the /INT pin. In the case of polled
operation, the host periodically reads the contents of
STATUS to check the state of the status bits. The act of
reading STATUS clears it. If more than one event that
sets a given status bit occurs before the host polls
STATUS, only the fact that at least one such event has
occurred will be apparent to the host. For polled systems,
the global interrupt enable bit should be clear (IE = 0).
This will disable interrupts from the MIC280 (prevents the
/INT pin from sinking current). For interrupt-driven
systems, IE must be set to enable the /INT output.
May 5, 2014 11 Revision 2.0
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet MIC280.PDF ] | |
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