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PDF MC10E195 Data sheet ( Hoja de datos )

Número de pieza MC10E195
Descripción PROGRAMMABLE DELAY CHIP
Fabricantes Motorola Semiconductors 
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No Preview Available ! MC10E195 Hoja de datos, Descripción, Manual

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Programmable Delay Chip
The MC10E/100E195 is a programmable delay chip (PDC) designed
primarily for clock de-skewing and timing adjustment. It provides variable
delay of a differential ECL input transition.
The delay section consists of a chain of gates organized as shown in
the logic symbol. The first two delay elements feature gates that have
been modified to have delays 1.25 and 1.5 times the basic gate delay of
approximately 80 ps. These two elements provide the E195 with a
digitally-selectable resolution of approximately 20 ps. The required
device delay is selected by the seven address inputs D[0:6], which are
latched on chip by a high signal on the latch enable (LEN) control.
Because the delay programmability of the E195 is achieved by purely
differential ECL gate delays the device will operate at frequencies of >1.0
GHz while maintaining over 600 mV of output swing.
The E195 thus offers very fine resolution, at very high frequencies, that
is selectable entirely from a digital input allowing for very accurate system
clock timing.
An eighth latched input, D7, is provided for cascading multiple PDC’s
for increased programmable range. The cascade logic allows full control
of multiple PDC’s, at the expense of only a single added line to the data
bus for each additional PDC, without the need for any external gating.
2.0ns Worst Case Delay Range
20ps/Delay Step Resolution
>1.0GHz Bandwidth
On Chip Cascade Circuitry
Extended 100E VEE Range of –4.2 to –5.46V
75KInput Pulldown Resistors
PIN NAMES
Pin Function
IN/IN
EN
D[0:7]
Q/Q
LEN
SET MIN
SET MAX
CASCADE
Signal Input
Input Enable
Mux Select Inputs
Signal Output
Latch Enable
Min Delay Set
Max Delay Set
Cascade Signal
MC10E195
MC100E195
PROGRAMMABLE
DELAY CHIP
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
D2 D3 D4 D5 D6 D7 NC
25 24 23 22 21 20 19
26 D1
NC 18
27 D0
NC 17
28 LEN
1 VEE
2 IN
Pinout:
28-Lead PLCC
(Top View)
VCC 16
VCCO 15
Q 14
3 IN
Q 13
4 VBB
56 7
NC NC EN
8
VCCO 12
9 10 11
VBB
IN 11
IN
EN
* 1.25
0
1
* 1.5
0
1
LEN
SET MIN
SET MAX
LOGIC DIAGRAM – SIMPLIFIED
0
11
0
1 11
4 GATES
0
1
7 BIT LATCH
8 GATES
0
1
16 GATES
LEN Q
LATCH
D
0
1
0
11
CASCADE
D0 D1 D2 D3 D4 D5 D6
* DELAYS ARE 25% OR 50% LONGER THAN
* STANDARD (STANDARD 80 PS)
12/93
© Motorola, Inc. 1996
2–1
D7
REV 2
Q
Q
CASCADE
CASCADE

1 page




MC10E195 pdf
MC10E195 MC100E195
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
MFAX: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
ECLinPS and ECLinPS Lite
DL140 — Rev 4
*MC10E195/D*MC10E195/D
2–5 MOTOROLA

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