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PDF ML7105-002 Data sheet ( Hoja de datos )
| Número de pieza | ML7105-002 | |
| Descripción | Bluetooth Low Energy | |
| Fabricantes | LAPIS | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ML7105-002 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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ML7105-002
Bluetooth®Low Energy
FEDL7105-002-01
Issue Date: June. 10, 2013
■Overview
ML7105-002 is a Bluetooth® Low Energy (here in after LE) LSI integrating RF, Baseband, microproccessor core
and each peripherals, which has Bluetooth® LE compliant 2.4GHz band radio communication capability.
ML7105-002 (hereafter "ML7105") is suitable for applications such as Wrist Watch, Remote Controller or PC
peripherals.
■Features
• Bluetooth® SIG Core Spec v4.0 compliant
• Ultra Low Power RF block
• Cortex-M0 Micro processor, it has interrupt controller and Sys-Tick Timer
• 64KB ROM (CODE_ROM) for Program, 16KB RAM (DATA_RAM) for Data
• 12KB RAM (CODE_RAM) for user Program
• Bluetooth® LE single mode compliant Baseband controller
• UART interface for Bluetooth® Host Controller Interface (HCI)
• SPI (Slave mode) interface for Custom Host Controller Interface
• I2C (Master & Slave) interface for EEPROM or Custom Host Controller Interface
• GPIO ports
• System Clock Timer and External Low Power Clock Timer
• Low Power operating mode
• Single power supply
1.6V to 3.6V
• Operating Temperature
-20 deg.C to 70 deg.C
• Current Consumptions
Deep Sleep Mode
below 0.7uA (with external Low Power Clock)
below 2.9uA (with internal Low Power Clock oscillator circuit)
Idle Mode
below 3.0mA
TX mode
below 9.0mA
RX mode
below 9.0mA
• Package
32pins WQFN (P-WQFN32-0505-0.50-A63)
Pb Free, RoHS compliant
1/30
1 page  
FEDL7105-002-01
ML7105-002
■Pin definition
I/O IRF
definitions I
: RF input and output
: Digital input
Ipd : Digital input with pull-down resistor
IA : Analog input
IAH : Analog input support 3V
ISH : Low-Power Clock input
XSH : X’tal pin for Low-Power Clock
XM : X’tal pin for Master Clock
O2 : Digital output with 2mA load capability
B2 : Digital inout with 2mA load capability
OA : Analog output
OAH : Analog output support 3V
●RF analog pins
No
Pin Name
Status in
reset
I/O
3 SWOUT
4 SWRX
5 SWTX
32 A0
1 A1
7 PLLLPF
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
IRF
IRF
IRF
IAH
IAH,
OA
Active
Level
---
---
---
---
---
---
Function
RF signal RX/TX inout
RX SW control signal
TX SW control signal
General purpose analog input
General purpose analog input
PLL Loop Filter
●XO, LPXO pins
No Pin Name
13 XOP
14 XON
10 LPCLKBUS
11 LPCLKIN
●SPI pins
No Pin Name
17 SPIDIN
18 SPIDOUT
19 SPIXCS
20 SPICLK
Status in
reset
Hi-Z
Hi-Z
0V
ISH
I/O
XM
XM
XSH
XSH, ISH
Status in
reset
Input
Output
Input
Input
I/O
I
B2
I
I
Active
Level
---
---
---
---
Active
Level
---
---
Low
---
Function
Positive inout pin for Master clock oscillator block
Negative inout pin for Master clock oscillator block
Low power clock Xtal output
Low power clock/Xtal input
Function
SPI SLAVE Data input
SPI SLAVE Data output
SPI SLAVE Chip Select
SPI SLAVE Clock
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5 Page 
FEDL7105-002-01
ML7105-002
Intermodulation
PER<30.8%
Wanted signal :-64dBm
(*2)
Maximum input level(*2)
RSSI detection range
(*2)
PIM
PRXMAX
PRSSIMA
X
PRSSIMIN
CW interering signal +/-3MHz
Modulated interfering signal
+/-6MHz
or
CW interfering signal +/-4MHz
Modulated interfering signal
+/-8MHz
or
CW interfering signal +/-5MHz
Modulated interfering signal
+/-10MHz
PER = 30.8% (*1)
Upper
Lower
-50
–
-40
–
(*1) PER=30.8% is corresponding to BER=0.1%
(*2) Condition: Ta = 25deg.、VDDHV = 3.3V
(*3) Follow RCV-LE/CA/04/C test spec of Bluetooth SIG
– – dBm
– -10 dBm
– – dBm
– -80 dBm
11/30
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ML7105-002.PDF ] | |
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