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PDF LTC2310-14 Data sheet ( Hoja de datos )

Número de pieza LTC2310-14
Descripción 2Msps Differential Input ADC
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LTC2310-14 Hoja de datos, Descripción, Manual

Features
LTC2310-14
14-Bit + Sign, 2Msps
Differential Input ADC with Wide
Input Common Mode Range
Description
nn 2Msps Throughput Rate
nn ±2.5LSB INL Guaranteed
nn Guaranteed 14-Bit, No Missing Codes
nn 8VP-P Differential Inputs with Wide Input Common
Mode Range
nn 82dB SNR (Typ) at fIN = 500kHz
nn –93dB THD (Typ) at fIN = 500kHz
nn No Cycle Latency
nn Guaranteed Operation –40°C to 125°C
nn Single 3.3V or 5V Supply
nn Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal
Reference with 1.25V External Reference Input
nn 1.8V to 2.5V I/O Voltages
nn CMOS or LVDS SPI-Compatible Serial I/O
nn Power Dissipation 35mW at VDD = 5V (Typ)
nn Small 16-Lead (4mm × 5mm) MSOP Package
Applications
nn High Speed Data Acquisition Systems
nn Communications
nn Remote Data Acquisition
nn Imaging
nn Optical Networking
nn Automotive
nn Multiphase Motor Control
The LTC®2310-14 is a low noise, high speed 14-bit +
sign successive approximation register (SAR) ADC with
differential inputs and wide input common mode range.
Operating from a single 3.3V or 5V supply, the LTC2310-14
has an 8VP-P differential input range, making it ideal for
applications which require a wide dynamic range with
high common mode rejection. The LTC2310-14 achieves
±2.5LSB INL guaranteed, no missing codes at 14 bits and
82dB SNR typical.
The LTC2310-14 has an onboard low drift (20ppm/°C max)
2.048V or 4.096V temperature-compensated reference and
provides an external 1.25V buffered reference input. The
LTC2310-14 also has a high speed SPI-compatible serial
interface that supports CMOS or LVDS. The fast 2Msps
throughput with no cycle latency makes the LTC2310-14
ideally suited for a wide variety of high speed applications.
The LTC2310-14 dissipates only 35mW with a 5V supply
and offers nap and sleep modes to reduce the power
consumption for further power savings during inactive
periods.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
DIFFERENTIAL INPUTS
NO CONFIGURATION REQUIRED
IN+, IN
ARBITRARY
VDD
DIFFERENTIAL
VDD
25Ω
0V 0V
BIPOLAR
VDD
UNIPOLAR
VDD
25Ω
0V 0V
3.3V OR 5V
1µF
47pF
AIN+ VDD REFOUT
LTC2310-14
REFIN
AIN–
CMOS/LVDS
GND
SDO
SCK
CNV
OVDD
10µF
10µF
LVDS OR CMOS
CONFIGURABLE
I/O
1.8V TO 2.5V
1µF
231014 TA01a
32k Point FFT fSMPL = 2Msps, fIN = 500kHz
0
SNR = 82dB
–20
THD = –93dB
SINAD = 81.7dB
SFDR = 97dB
–40
–60
–80
–100
–120
–140
0
0.2 0.4 0.6 0.8 1.0
FREQUENCY (MHz)
231014 TA01b
231014f
For more information www.linear.com/LTC2310-14
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LTC2310-14 pdf
LTC2310-14
Power Requirements The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C (Note 4).
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VDD Supply Voltage 5V Operation
3.3V Operation
l 4.75
l 3.13
5.25 V
3.47 V
OVDD
Supply Voltage
IVDD Supply Current
INAP Nap Mode Current
ISLEEP Sleep Mode Current
CMOS I/O Mode
2Msps Sample Rate (AIN+ = AIN– = 0V)
Conversion Done (IVDD)
VDD = 3.3V, Sleep Mode (IVDD + IOVDD)
l 1.71
2.63 V
l 6.8 11 mA
l 2.8 4 mA
l
0.1 10
μA
IOVDD
PD_3.3V
Supply Current
Power Dissipation
Nap Mode
Sleep Mode
PD_5V
Power Dissipation
Nap Mode
Sleep Mode
LVDS I/O Mode
2Msps Sample Rate (CL = 5pF)
VDD = 3.3V 2Msps Sample Rate (AIN+ = AIN– = 0V)
VDD = 3.3V Conversion Done (IVDD + IOVDD)
VDD = 3.3V Sleep Mode (IVDD + IOVDD)
VDD = 5V 2Msps Sample Rate (AIN+ = AIN– = 0V)
VDD = 5V Conversion Done (IVDD + IOVDD)
VDD = 5V Sleep Mode (IVDD + IOVDD)
l
l
l
l
0.5 1 mA
25 mW
7.5 mW
0.3 μW
35 55 mW
14 20 mW
0.5 40 μW
IOVDD
PD_3.3V
PD_5V
Supply Current
Power Dissipation
Nap Mode
Sleep Mode
Power Dissipation
Nap Mode
Sleep Mode
2Msps Sample Rate (RL = 100Ω)
VDD = 3.3V 2Msps Sample Rate (AIN+ = AIN– = 0V)
VDD = 3.3V Conversion Done (IVDD + IOVDD)
VDD = 3.3V Sleep Mode (IVDD + IOVDD)
VDD = 5V 2Msps Sample Rate (AIN+ = AIN– = 0V)
VDD = 5V Conversion Done (IVDD + IOVDD)
VDD = 5V Sleep Mode (IVDD + IOVDD)
l
l
l
l
2.7 4 mA
30 mW
14 mW
0.3 µW
40 60 mW
20 30 mW
0.5 50 µW
A DC Timing Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 4).
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
CMOS, LVDS I/O Modes
fSMPL
tCYC
tACQ
tCONV
tREADOUT
tCNVH
tDCNVSCKL
tDSCKLCNVH
tSCK
tSCKH
tSCKL
Maximum Sampling Frequency
Time Between Conversions
Acquisition Time
Conversion Time
Readout Time
CNV High Time
SCK Quiet Time from CNV
SCK Delay Time to CNV
SCK Period
SCK High Time
SCK Low Time
(Note 11)
(Note 11)
(Note 11)
(Note 11)
(Notes 12, 13)
l
l 500
l 280
l 220
l 250
l 30
l 220
l0
l 15.6
l5
l5
2
1000000
Msps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
For more information www.linear.com/LTC2310-14
231014f
5

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LTC2310-14 arduino
Timing Diagram
LTC2310-14
CNV
SCK
HI-Z
SDO
CONVERSION
CMOS, LVDS I/O Modes
READOUT
ACQUISITION
123456
B14 B13 B12 B11 B10
13 14 15 16
B2 B1 B0
0 HI-Z
SERIAL DATA BITS B[14:0] CORRESPOND TO CURRENT CONVERSION
231014 TD
For more information www.linear.com/LTC2310-14
231014f
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