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PDF MR26T51203L Data sheet ( Hoja de datos )
| Número de pieza | MR26T51203L | |
| Descripción | P2ROM | |
| Fabricantes | LAPIS | |
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MR26T51203L
P2ROM32M–Word × 16–Bit or 64M–Word × 8–Bit
FEDR26T51203L-002-02
Issue Date: Oct. 01, 2008
FEATURES
· 33,554,432-word × 16-bit/67,108,864-word × 8-bit
electrically switchable configuration
· Access time
2.7 V to 3.6 V power supply.........120 ns MAX
3.0 V to 3.6 V power supply.........100 ns MAX
· Operating current ..........................35 mA MAX(5MHz)
· Standby current .............................10 µA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR26T51203L-xxxTM
50-pin plastic TSOP (P-TSOP(2)50- 400-0.80-K-MC)
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing.
Advancements in this technology allows production costs to be
equivalent to MASKROM and has many advantages and added
benefits over the other non-volatile technologies, which
include the following;
PIN CONFIGURATION (TOP VIEW)
A11 1
A10 2
A9 3
A8 4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A23 12
GND 13
BYTE# 14
A0 15
D0 16
D8 17
D1 18
D9 19
Vcc 20
D2 21
D10 22
D3 23
D11 24
GND 25
50TSOP
(Type2)
50 CE#
49 A12
48 A13
47 A14
46 A15
45 Vcc
44 A16
43 A17
42 A18
41 A19
40 A20
39 A21
38 GND
37 A22
36 A24
35 OE#
34 D15/A-1
33 D7
32 D14
31 D6
30 D13
29 D5
28 D12
27 D4
26 Vcc
· Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive
lead-time and minimize liability as a custom product.
· No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges
apply.
· No additional programming charge, unlike Flash and OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput.
The cost is included in the unit price.
· Custom Marking is available at no additional charge.
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1 page  
FEDR26T51203L-002-02
MR26T51203L / P2ROM
TIMING CHART (READ CYCLE)
16-Bit Read Mode (BYTE# = VIH)
tC
A0 to A24
CE#
OE#
D0 to D15
tCE
tOE
tACC
Hi-Z
tC
tACC
tOH
Valid Data
tOH
tCHZ
tOHZ
Valid Data
Hi-Z
8-Bit Read Mode (BYTE# = VIL)
tC
A-1 to A24
CE#
OE#
D0 to D7
tCE
tOE
tACC
Hi-Z
tC
tACC
tOH
Valid Data
tOH
tCHZ
tOHZ
Valid Data
Hi-Z
5/8
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MR26T51203L.PDF ] | |
Hoja de datos destacado
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