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PDF CY62148GN Data sheet ( Hoja de datos )
| Número de pieza | CY62148GN | |
| Descripción | 4-Mbit (512K x 8) Static RAM | |
| Fabricantes | Cypress | |
| Logotipo |  |
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CY62148GN MoBL®
4-Mbit (512K × 8) Static RAM
4-Mbit (512K × 8) Static RAM
Features
■ Very high speed: 45 ns
■ Wide voltage range: 2.2 V to 3.6 V, 4.5 V to 5.5 V
■ Ultra low standby power
❐ Typical standby current: 3.5 µA
❐ Maximum standby current: 8.7 µA
■ Easy memory expansion with CE and OE features
■ Automatic power-down when deselected
■ Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
■ Available in Pb-free 32-pin thin small outline package (TSOP) II
and 32-pin small-outline integrated circuit (SOIC) packages
Functional Description
The CY62148GN is a high-performance CMOS static RAM
organized as 512K words by 8-bits. This device features
advanced circuit design to provide ultra low standby current. This
is ideal for providing More Battery Life™ (MoBL) in portable
Logic Block Diagram
applications. The device also has an automatic power-down
feature that significantly reduces power consumption when
addresses are not toggling. Placing the device in standby mode
reduces power consumption by more than 99% when deselected
(CE HIGH). The eight input and output pins (I/O0 through I/O7)
are placed in a high-impedance state when the device is
deselected (CE HIGH), Outputs are disabled (OE HIGH), or
during an active Write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7)
is then written into the location specified on the address pins (A0
through A18).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appear on the I/O pins.
For a complete list of related documentation, click here.
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
CE
WE
OE
INPUT BUFFER
512K x 8
ARRAY
COLUMN DECODER
POWER
DOWN
IIO/O00
IIO/O11
IIO/O22
IIO/O33
IIO/O44
IIO/O55
IIO/O66
IIO/O77
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-95418 Rev. *A
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 19, 2016
1 page  
CY62148GN MoBL®
Capacitance
Parameter [8]
Description
CIN
COUT
Input capacitance
Output capacitance
Thermal Resistance
Parameter [8]
Description
JA Thermal resistance
(junction to ambient)
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25 °C, f = 1 MHz, VCC = VCC(Typ)
Max Unit
10 pF
10 pF
Test Conditions
Still air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
32-pin SOIC
Package
51.79
25.12
32-pin TSOP II
Package
Unit
79.03
C/W
17.44
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms [9]
VCC
OUTPUT
R1
30 pF
R2
ALL INPUT PULSES
3.0 V
10%
GND
Rise Time = 1 V/ns
90%
90%
10%
Fall Time = 1 V/ns
INCLUDING
JIG AND
SCOPE
Equivalent to: THEVENIN EQUIVALENT
OUTPUT
RTH
V
Parameter [8]
R1
R2
RTH
VTH
2.5 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
5.0 V
1800
990
639
1.77
Unit
V
Notes
8. Tested initially and after any design or process changes that may affect these parameters.
9. Full-device operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs.
Document Number: 001-95418 Rev. *A
Page 5 of 16
5 Page 
CY62148GN MoBL®
Ordering Information
Table 1 lists the CY62148GN MoBL® key package features and ordering codes. The table contains only the parts that are currently
available. If you do not see what you are looking for, contact your local sales representative. For more information, visit the Cypress
website at www.cypress.com and refer to the product summary page at http://www.cypress.com/products.
Table 1. Key features and Ordering Information
Speed
(ns)
Voltage Range (V)
45 2.2 V–3.6 V
4.5 V–5.5 V
Ordering Code
CY62148GN30-45ZSXI
CY62148GN30-45SXI
CY62148GN-45ZSXI
CY62148GN-45SXI
Package
Diagram
Package Type
51-85095 32-pin TSOP II (Pb-free)
51-85081 32-pin SOIC (Pb-free)
51-85095 32-pin TSOP II (Pb-free)
51-85081 32-pin SOIC (Pb-free)
Operating
Range
Industrial
Ordering Code Definitions
CY 621 4 8 GN XX - XX XX X X
Temperature Grade: X = I
I = Industrial
Pb-free
Package Type: XX = ZS or S
ZS = 32-pin TSOP II
S = 32-pin SOIC
Speed Grade: XX = 45 ns
Voltage Range: 30 = 3 V typ; no character = 5 V typ
Process Technology: GN = 65 nm
Bus width: 8 = × 8
Density: 4 = 4-Mbit
Family Code: 621 = MoBL SRAM family
Company ID: CY = Cypress
Document Number: 001-95418 Rev. *A
Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CY62148GN.PDF ] | |
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