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PDF PI6C49S1510 Data sheet ( Hoja de datos )

Número de pieza PI6C49S1510
Descripción High Performance Differential Fanout Buffer
Fabricantes Pericom Semiconductor 
Logotipo Pericom Semiconductor Logotipo



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No Preview Available ! PI6C49S1510 Hoja de datos, Descripción, Manual

PI6C49S1510
High Performance Differential Fanout Buffer
Features
ÎÎ10 differential outputs with 2 banks
ÎÎUser configurable output signaling standard for each bank:
LVDS or LVPECL or HCSL
ÎÎLVCMOS reference output up to 200MHz
ÎÎUp to 1.5GHz output frequency for differential outputs
ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range); < 0.02 ps
(typ) (differential 156.25MHz, 10kHz to 1MHz integration
range)
ÎÎSelectable reference inputs support either single-ended
or differential or Xtal
ÎÎLow skew between outputs within banks (<40ps)
ÎÎLow delay from input to output (Tpd typ. < 1.7ns)
ÎÎSeparate Input output supply voltage for level shifting
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTQFN-48 package
Description
The PI6C49S1510 is a high performance fanout buffer device-
which supports up to 1.5GHz frequency. It also integrates a
unique feature with user configurable output signaling stan-
dards on per bank basis which provide great flexibilities to
users. The device also uses Pericom's proprietary input detection
technique to make sure illegal input conditions will be detected
and reflected by output states. This device is ideal for systems
that need to distribute low jitter clock signals to multiple desti-
nations.
Applications
ÎÎNetworking systems including switches and Routers
ÎÎHigh frequency backplane based computing and telecom
platforms
Block Diagram
Pin Configuration (48-Pin TQFN)
X1
X2
IN0+
IN0-
IN1+
IN1-
OSC
IN_SEL[1:0]
Sync_OE
Iref
Sync
OPMODEA[1:0]
QA[0:4]
5
OPMODEB[1:0]
QB[0:4]
5
Ref_Out
QAO+
QAO-
QA1+
QA1-
VDDO
QA2+
QA2-
VDDO
QA3+
QA3-
QA4+
QA4-
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6 31
7 30
8 29
9 28
10 27
11 26
12 25
13 14 15 16 17 18 19 20 21 22 23 24
QBO+
QBO-
QB1+
QB1-
VDDO
QB2+
QB2-
VDDO
QB3+
QB3-
QB4+
QB4-
PI6C49S1510
Rev J
16-0147
1
www.diodes.com
August 2016
© Diodes Incorporated

1 page




PI6C49S1510 pdf
DC Electrical Specifications - LVCMOS Inputs
Symbol Parameter
Conditions
IIH Input High current
Input = VDD
IIL Input Low current
Input = GND
VIH Input high voltage
VDD=3.3V
VIL Input low voltage
VDD=3.3V
VIH Input high voltage
VDD=2.5V
VIL Input low voltage
VDD=2.5V
DC Electrical Specifications- LVPECL Outputs
Parameter
VOH
VOL
Description
Output High voltage
Output Low voltage
Conditions
DC Electrical Specifications- LVDS Outputs
Parameter
VOH
VOL
Vocm
DVocm
Ro
Description
Output High voltage
Output Low voltage
Output commode voltage
Change in Vocm between com-
pletely output states
Output impedance
Conditions
DC Electrical Specifications – HCSL Outputs
Parameter
VOH
VOL
Description
Output High voltage
Output Low voltage
Conditions
PI6C49S1510
Rev J
16-0147
5
PI6C49S1510
Min. Typ.
-150
2.0
-0.3
1.7
-0.3
Max.
150
Units
uA
uA
VDD+0.3 V
0.8 V
VDD+0.3 V
0.7 V
Min. Typ.
VDDO-1.4
VDDO-2.1
Max. Units
VDDO-0.9 V
VDDO-1.7 V
Min.
Typ.
1.433
1.064
1.25
85
Max.
50
140
Units
V
V
V
mV
W
Min. Typ. Max. Units
520 900 mV
-150 150 mV
www.diodes.com
August 2016
© Diodes Incorporated

5 Page





PI6C49S1510 arduino
Configuration Test Load Board Termination for HCSL Outputs
PI6C49S1510
DUT
475Ω
1%
Rs
33Ω
5%
Rs
33Ω
5%
Rp
49.9Ω
1%
TLA
Rp
49.9Ω
1%
TLB
2pF
5%
Clock
Clock#
2pF
5%
Configuration Test Load Board Termination for LVCMOS Outputs
3.3V ±5%
VDD
VDDO
GND
10pF
PI6C49S1510
Rev J
16-0147
11
www.diodes.com
August 2016
© Diodes Incorporated

11 Page







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