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PDF PI6C4911505-07 Data sheet ( Hoja de datos )
| Número de pieza | PI6C4911505-07 | |
| Descripción | High Performance 1:5 LVPECL Fanout Buffer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI6C4911505-07
High Performance 1:5 LVPECL Fanout Buffer
Features
ÎÎ5 LVPECL outputs
ÎÎUp to 1.5GHz output frequency
ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range)
ÎÎTwo selectable inputs
ÎÎLow delay from input to output (Tpd typ. 1.2ns)
ÎÎSeparate Input output supply voltage for level shifting
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTSSOP-20 package
Description
The PI6C4911505-07 is a high performance fanout buffer device-
which supports up to 1.5GHz frequency. The device has 2 select-
able clock inputs that can accept most differential clock sources.
This device is ideal for systems that need to distribute low jitter
clock signals to multiple destinations.
Applications
ÎÎNetworking systems including switches and Routers
ÎÎHigh frequency backplane based computing and telecom
platforms
Block Diagram
nEN Pulldown
CLK0 Pulldown
nCLK0 Pullup/Pulldown
CLK1 Pulldown
nCLK1 Pullup/Pulldown
CLK_SEL Pulldown
D
Q
LE
0
1
Pin Configuration (20-Pin TSSOP)
Q0 1
20 VDD
nQ0 2
19 nEN
Q0
nQ0
Q1 3
18 VDD
Q1
nQ1 4
17 nCLK1
nQ1
Q2 5
16 CLK1
Q2
nQ2
nQ2 6
15 NC
Q3
nQ3
Q3 7
14 nCLK0
Q4
nQ3 8
13 CLK0
nQ4
Q4 9
12 CLK_SEL
nQ4 10
11 VEE
16-0016
1
www.pericom.com
PI6C4911505-07 Rev C
01/26/16
1 page  
PI6C4911505-07
High Performance 1:5 LVPECL Fanout Buffer
DC Electrical Specifications - LVCMOS Inputs
Symbol Parameter
Conditions
IIH Input High current
Input = VDD
IIL Input Low current
Input = GND
VIH Input high voltage
VDD=3.3V
VIL Input low voltage
VDD=3.3V
VIH Input high voltage
VDD=2.5V
VIL Input low voltage
VDD=2.5V
Min. Typ.
-150
2.0
-0.3
1.7
-0.3
Max.
150
Units
uA
uA
3.765
V
0.8 V
VDD+0.3 V
0.7 V
DC Electrical Specifications- LVPECL Outputs
Parameter
VOH
Description
Output High voltage
VOL Output Low voltage
Conditions
VDD=3.3V
VDD=2.5V
VDD=3.3V
VDD=2.5V
Min.
2.1
1.3
1.3
0.5
Typ.
Max.
2.6
1.6
1.8
1.0
Units
V
V
16-0016
5
www.pericom.com
PI6C4911505-07 Rev C
01/26/16
5 Page 
PI6C4911505-07
High Performance 1:5 LVPECL Fanout Buffer
3) Chassis air flow and cooling mechanism. More air flow M/s
and adding heat sink on device can reduce device final die junc-
tion temperature Tj
The individual device thermal calculation formula:
Tj =Ta + Pchip x Ja
Tc = Tj - Pchip x Jc
Ja ___ Package thermal resistance from die to the ambient air
in C/W unit; This data is provided in JEDEC model simulation.
An air flow of 1m/s will reduce Ja (still air) by 20~30%
Jc ___ Package thermal resistance from die to the package case
in C/W unit
Tj ___ Die junction temperature in C (industry limit <125C
max.)
Ta ___ Ambiant air température in C
Tc ___ Package case temperature in C
Pchip___ IC actually consumes power through Iee/GND cur-
rent
Thermal calculation example
To calculate Tj and Tc of PI6CV304 in an SOIC-8 package:
Step 1: Go to Pericom web to find Ja=157 C/W, Jc=42 C/W
http://www.pericom.com/support/packaging/packaging-me-
chanicals-and-thermal-characteristics/
Step 2: Go to device datasheet to find Idd=40mA max.
Step 3: P_total= 3.3Vx40mA=0.132W
Step 4: If Ta=85C
Tj= 85 + Ja xP_total= 85+25.9 = 105.7C
Tc= Tj + Jc xP_total= 105.7- 5.54 = 100.1C
Note:
The above calculation is directly using Idd current without sub-
tracting the load power, so it is a conservative estimation. For
more precise thermal calculation, use P_unload or P_chip from
device Iee or GND current to calculate Tj, especially for LVPECL
buffer ICs that have a 150ohm pull-down and equivalent 100ohm
differential RX load.
Thermal Information
Symbol
QJA
QJC
Description
Junction-to-ambient thermal resistance
Junction-to-case thermal resistance
Condition
Still air
84.0 OC/W
17.0 OC/W
16-0016
11
www.pericom.com
PI6C4911505-07 Rev C
01/26/16
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet PI6C4911505-07.PDF ] | |
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