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PDF PI6C4911504-01 Data sheet ( Hoja de datos )
| Número de pieza | PI6C4911504-01 | |
| Descripción | High Performance LVPECL Fanout Buffer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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Features
ÎÎ4 LVPECL outputs
ÎÎUp to 1.5GHz output frequency
ÎÎUltra low additive phase jitter: < 0.04 ps (typ)
ÎÎTwo selectable inputs
ÎÎLow delay from input to output (Tpd typ. < 1.0ns)
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTSSOP-20 package
PI6C4911504-01
High Performance LVPECL Fanout Buffer
Description
The PI6C4911504-01 is a high performance fanout buffer device
which supports up to 1.5GHz frequency. This device is ideal for
systems that need to distribute low jitter clock signals to mul-
tiple destinations.
Applications
ÎÎNetworking systems including switches and Routers
ÎÎHigh frequency backplane based computing and telecom
platforms
Block Diagram
SYNC_OE Pullup
REF_IN0+ Pulldown
REF_IN0- Pullup
REF_IN1+ Pulldown
REF_IN1- Pullup
IN_SEL Pulldown
0
1
D
Q
LE
15-0027
Pin Configuration (20-Pin TSSOP)
GND 1
Q0+
Q0-
SYNC_OE 2
IN_SEL 3
Q1+
Q1-
REF_IN0+ 4
REF_IN0- 5
Q2+
Q2-
REF_IN1+ 6
REF_IN1- 7
Q3+
Q3- nc 8
nc 9
VDD 10
20 Q0+
19 Q0-
18 VDD
17 Q1+
16 Q1-
15 Q2+
14 Q2-
13 VDD
12 Q3+
11 Q3-
1 www.pericom.com
PI6C4911504-01 Rev A
2/27/15
1 page  
PI6C4911504-01
High Performance LVPECL Fanout Buffer
Phase Noise Plots
fOUT = 156.25MHz
Output phase noise (Dark Blue) vs Input Phase noise (light blue)
Additive jitter is calculated at 156.25MHz~40fs RMS (12kHz to 20MHz). Additive jitter = √(Output jitter2 - Input jitter2)
15-0027
5 www.pericom.com
PI6C4911504-01 Rev A
2/27/15
5 Page 
PI6C4911504-01
High Performance LVPECL Fanout Buffer
3) Chassis air flow and cooling mechanism. More air flow M/s
and adding heat sink on device can reduce device final die junc-
tion temperature Tj
The individual device thermal calculation formula:
Tj =Ta + Pchip x Ja
Tc = Tj - Pchip x Jc
Ja ___ Package thermal resistance from die to the ambient air
in C/W unit; This data is provided in JEDEC model simulation.
An air flow of 1m/s will reduce Ja (still air) by 20~30%
Jc ___ Package thermal resistance from die to the package case
in C/W unit
Tj ___ Die junction temperature in C (industry limit <125C
max.)
Ta ___ Ambiant air température in C
Tc ___ Package case temperature in C
Pchip___ IC actually consumes power through Iee/GND cur-
rent
Thermal calculation example
To calculate Tj and Tc of PI6CV304 in an SOIC-8 package:
Step 1: Go to Pericom web to find Ja=157 C/W, Jc=42 C/W
http://www.pericom.com/support/packaging/packaging-me-
chanicals-and-thermal-characteristics/
Step 2: Go to device datasheet to find Idd=40mA max.
Step 3: P_total= 3.3Vx40mA=0.132W
Step 4: If Ta=85C
Tj= 85 + Ja xP_total= 85+25.9 = 105.7C
Tc= Tj + Jc xP_total= 105.7- 5.54 = 100.1C
Note:
The above calculation is directly using Idd current without sub-
tracting the load power, so it is a conservative estimation. For
more precise thermal calculation, use P_unload or P_chip from
device Iee or GND current to calculate Tj, especially for LVPECL
buffer ICs that have a 150ohm pull-down and equivalent 100ohm
differential RX load.
Thermal Information
Symbol
QJA
QJC
Description
Junction-to-ambient thermal resistance
Junction-to-case thermal resistance
Condition
Still air
84.0 OC/W
17.0 OC/W
15-0027
11 www.pericom.com
PI6C4911504-01 Rev A
2/27/15
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet PI6C4911504-01.PDF ] | |
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