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PDF PI6C4911506 Data sheet ( Hoja de datos )
| Número de pieza | PI6C4911506 | |
| Descripción | 6 Output High Performance LVPECL Fanout Buffer | |
| Fabricantes | Pericom Semiconductor | |
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PI6C4911506
6 Output High Performance LVPECL Fanout Buffer
Features
ÎÎ6 LVPECL outputs
ÎÎUp to 1.5GHz output frequency
ÎÎUltra low additive phase jitter: < 0.03 ps (typ) (differential
156.25MHz, 12KHz to 20MHz integration range)
ÎÎSingle differential input
ÎÎLow delay from input to output (Tpd typ. < 700ps)
ÎÎ2.5V / 3.3V power supply
ÎÎIndustrial temperature support
ÎÎTSSOP-20 package
Description
The PI6C4911506 is a high performance fanout buffer device-
which supports up to 1.5GHz frequency. This device is ideal
for systems that need to distribute low jitter clock signals to
multiple destinations.
Applications
ÎÎNetworking systems including switches and Routers
ÎÎHigh frequency backplane based computing and telecom
platforms
Block Diagram
REF_IN+
REF_IN-
VBB
14-0093
Pin Configuration (20-Pin TSSOP)
CLK0
CLK0#
CLK1
CLK1#
CLK2
CLK2#
CLK3
CLK3#
CLK4
CLK4#
CLK5
CLK5#
VDD
CLK0#
CLK0
CLK1#
CLK1
CLK2#
CLK2
VDD
REF_IN+
REF_IN-
1
2
3
4
5
6
7
8
9
10
20 VDD
19 CLK5
18 CLK5#
17 CLK4
16 CLK4#
15 CLK3
14 CLK3#
13 VDD
12 VEE
11 VBB
1 www.pericom.com
PI6C4911506
RevA
06/12/14
1 page  
PI6C4911506
6 Output High Performance LVPECL Fanout Buffer
AC Electrical Characteristics
AC Characteristics, (TA = -40ºC to 85ºC)
Symbol Parameter
Condition
Min Typ
FOUT Output Frequency
TPD Propagation Delay
VDD = 3.3 V
VDD = 2.5 V
400 520
450 560
TSK(0)
TSK(P)
TJITTER
TR/TF
Output Skew
Part to Part Skew
Additive Jitter
Output Rise/ Fall Time
0.03
20% to 80%, Freq= 156.25MHz 100 180
10% to 90%, Freq = 156.25MHz 340 500
Max
1.5
650
700
50
230
250
800
Units
GHz
ps
ps
ps
ps
ps
ps
14-0093
5 www.pericom.com
PI6C4911506
RevA
06/12/14
5 Page 
PI6C4911506
6 Output High Performance LVPECL Fanout Buffer
Device LVPECL Output Terminations
LVPECL Output Popular Termination
The most popular LVPECL termination is 150ohm pull-down
bias and 100ohm across at RX side. Please consult ASIC data-
sheet if it already has 100ohm or equivalent internal termina-
tion. If so, do not connect external 100ohm across as shown in
Fig. 6. This popular termination’s advantage is that it does not
allow any bias through from Vcc. This prevents Vcc system noise
coupling onto clock trace.
LVPECL Output AC Thevenin Termination
LVPECL AC Thevenin terminations require a 150ohm pull-
down before the AC coupling capacitor at the source as shown
in Fig. 8. Note that pull-up/down resistor value is swapped
compared to Fig. 7. This circuit is good for short trace (<5in.)
application only.
Fig. 10 LVPECL Output AC Thenvenin Termination
Fig. 6 LVPECL Output Popular Termination
LVPECL Output Thevenin Termination
Fig. 7 shows LVPECL output Thevenin termination which is
used for shorter trace drive (<5in.), but it takes Vcc bias current
and Vcc noise can get onto clock trace. It also requires more
component count. So it is seldom used today.
LVPECL Output Drive HCSL Input
Using the LVPECL output to drive a HCSL input can be done
using a typical LVPECL AC Thenvenin termination scheme.
Use pull-up/down 450/60ohm to generate Vcm=0.4V for the
HCSL input clock. This termination is equivalent to 50Ohm
load as shown in Fig. 9.
Fig. 7 LVPECL Thevenin Output Termination
Fig. 9 LVPECL Output Drive HCSL Termination
14-0093
11 www.pericom.com
PI6C4911506
RevA
06/12/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet PI6C4911506.PDF ] | |
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