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PDF PI6CDBL401B Data sheet ( Hoja de datos )
| Número de pieza | PI6CDBL401B | |
| Descripción | 4-Output Low Power PCIE GEN1-2-3 Buffer | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI6CDBL401B
4-Output Low Power PCIE GEN1-2-3 Buffer
Features
ÎÎ4x 100MHz low power HCSL or LVDS compatible outputs
ÎÎPCIe 3.0, 2.0 and 1.0 compliant
ÎÎProgrammable output amplitude and slew rate
ÎÎCore supply voltage of 3.3V +/-10%
ÎÎOutput supply voltage of 1.8V, 2.5V and 3.3V
ÎÎIndustrial ambient operation temperature
ÎÎAvailable in lead-free package: 32-TQFN
Block Diagram
Description
The PI6CDBL401B is a 4-output low power buffer for 100MHz
PCIe Gen1, Gen2 and Gen3 applications with integrated output
terminations providing Zo=100Ω. The device has 4 output en-
ables for clock management, and 3 selectable SMBus addresses.
Applications
ÎÎPCIe 3.0/2.0/1.0 clock distribution
OE(3:0)#
CLK_IN
CLK_IN#
SADR_tri
HIBW_BYPM_LOBW#
CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
CONTROL
LOGIC
ZDB PLL
4
CLK(3:0)
All trademarks are property of their respective owners.
16-0064
1 www.pericom.com
PI6CDBL401B Rev.C
03/23/16
1 page  
PI6CDBL401B
4-Output Low Power PCIE GEN1-2-3 Buffer
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Supply Voltage to Ground Potential.......................................................4.6V
All Inputs and Output......................................................-0.5V toVDD+0.5V
Note: Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any
Ambient Operating Temperature............................................ -40 to +85°C other conditions above those indicated in the operational sections
Storage Temperature........................................................... –65°C to +150°C
Junction Temperature........................................................................... 125°C
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Soldering Temperature.......................................................................... 260°C
ESD Protection (Input)............................................................2000V(HBM)
Electrical Characteristics–Clock Input Parameters (TA = -40~85oC; VDD = 3.3V+/-10%; VDDO =
3.3V+/-10%; VDDO = 2.5V+/-10%; VDDO = 1.8V+/-10%, See Test Loads for Loading Conditions)
Symbol Parameters
VIHDIF
Input High Voltage - CLK_IN1
VILDIF
VCOM
VSWING
dv/dt
IIN
dtin
JDIFIn
Input Low Voltage - CLK_IN1,3
Input Common Mode Voltage -
CLK_IN1
Input Amplitude - CLK_IN1
Input Slew Rate - CLK_IN1,2
Input Leakage Current1
Input Duty Cycle1
Input Jitter - Cycle to Cycle1
Condition
Differential inputs
(single-ended measurement)
Differential inputs
(single-ended measurement)
Common Mode Input Voltage
Peak to Peak value (VIHDIF - VILDIF)
Measured differentially
VIN = VDD , VIN = GND
Measurement from differential wavefrom
Differential Measurement
Min. Type Max. Units
600 800 1150 mV
3V0SS0-
0
300
300
0.4
-5
45
0
300 mV
725 mV
1450 mV
V/ns
5 uA
55 %
150 ps
Note:
1. Guaranteed by design and characterization, not 100% tested in production.
2. Slew rate measured through +/-75mV window centered around differential zero
3. The device can be driven from a single ended clock by driving the true clock and biasing the complement clock input to the VBIAS, where VBIAS is (VIH-
HIGH - VIHLOW)/2
Electrical Characteristics–Input/Supply/Common Parameters–Normal Operating
Conditions
f(oTAr
= -40~85oC; VDD =
Loading Conditions)
3.3V+/-10%;
VDDO
=
3.3V+/-10%;
VDDO
=
2.5V+/-10%;
VDDO
=
1.8V+/-10%,
See
Test
Loads
Symbol Parameters
VDDX
Supply Voltage1
VDDO
Supply Voltage1
TA
Ambient Operating
Temperature1
Condition
Supply voltage for core, analog
Supply voltage outputs
Min.
3.0
2.97
2.25
1.62
-40
Type
3.3
3.3
2.5
1.8
Max.
3.6
3.63
2.75
1.98
25 85
Units
V
V
°C
All trademarks are property of their respective owners.
16-0064
5 www.pericom.com
PI6CDBL401B Rev.C
03/23/16
5 Page 
PI6CDBL401B
4-Output Low Power PCIE GEN1-2-3 Buffer
Serial Data Interface (SMBus)
This part is a slave only device that supports blocks read and block write protocol using a single 7-bit address and read/write bit as
shown below.
Read and write block transfers can be stopped after any complete byte transfer by issuing STOP.
Address Assignment
Refer to SMBus Address Selection Table.
Data Protocol
(Write)
1 bit 8 bits 1 8 bits 1
8 bits
1
Start bit
Slave
Addr: D4
Ack
Register
offset
Ack
Byte
Count=N
Ack
8 bits
Data
Byte 0
1
Ack
8 bits 1
…
Data
Byte N-1
Ack
1 bit
Stop bit
(Read)
1 bit 8 bits 1 8 bits 1 1 8 bits 1 8 bits 1
Start bit
Slave
Addr: D4
Ack
Register
offset
Ack
Repeat
start
Slave
Addr: D5
Ack
Byte
Count=N
Ack
8 bits
Data
Byte 0
1 8 bits 1
Ack
…
Data Byte
N-1
NOT
Ack
1 bit
Stop
bit
Note:
1. Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.
All trademarks are property of their respective owners.
16-0064
11 www.pericom.com
PI6CDBL401B Rev.C
03/23/16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet PI6CDBL401B.PDF ] | |
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