PDF PI6C49018 Data sheet ( Hoja de datos )

Número de pieza	PI6C49018
Descripción	Low Power Networking Clock Generator
Fabricantes	Pericom Semiconductor
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No Preview Available ! PI6C49018 Low Power Networking Clock Generator Features ÎÎ25 MHz crystal or clock input ÎÎFour differential 100 MHz PCI-Express clock outputs – Low power HCSL ÎÎSpread spectrum capability on all 100 MHz PCI-e clock outputs with -0.5% down spread ÎÎOne single-ended 66.66 MHz output ÎÎOne single-ended 125 MHz output for Gigabit Ethernet at 2.5V ÎÎOne single-ended 80 MHz output with selectable down spread ÎÎ40-pin TQFN package ÎÎOperating voltage 3.3 V ±5% ÎÎIndustrial temperature (-40 to +85°C) Description The PI6C49018 is a clock generator device intended for PCI- Express/networking applications. The device includes four 100 MHz differential outputs for PCI-Express with low power HCSL structure, one CMOS 125 MHz output, and one CMOS 66.66 MHz, and one CMOS 80 MHz output with spread spectrum. Using a serially programmable SMBus interface, the PI6C49018 incorporates spread spectrum modulation on the four 100 MHz PCI-Express outputs with -0.5% down spread and the 80 MHz output with selectable down spread. Block Diagram 14-0209 1 www.pericom.com PI6C49018 Rev. A 12/10/2014 1 page PI6C49018 Low Power Networking Clock Generator Serial Data Interface (SMBus) This part is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit ad- dress and read/write bit as shown below. Address Assignment A6 A5 A4 A3 A2 A1 A0 W/R 1 1 0 1 0 0 1 0/1 How to Write 1 bit 8 bits Start bit D2H 1 8 bits 1 8 bits 1 8 bits 1 8 bits 1 Ack Register offset Ack Byte Count =N Ack Data Byte 0 Ack … Data Byte N-1 Ack 1 bit Stop bit Note: 1. Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0. How to Read (M: abbreviation for Master or Controller; S: abbreviation for slave/clock) 1 bit 8 bits 1 bit 8 bits 1 bit 1 bit 8 bits 1 bit 8 bits 1 bit 8 bits 1 bit … 8 bits M: send M: M: S: starting S: M: Start Send sends databyte sends Start bit "D2h" Ack location: Ack bit N M: Send "D3h" S: sends Ack S: sends # of data bytes that will be sent: X M: sends Ack S: sends start- ing data byte N M: sends Ack S: sends … data byte N+X-1 1 bit M: Not Ac- knowl- edge 1 bit M: Stop bit Byte 0: Spread Spectrum Control Register Bit Description Type 7 Spread Select for 100 MHz push-pull PCI-Express clocks RW 6 Enables hardware or software control of OE bits (see Byte 0-Bit 6 and Bit 5 Functionality table) RW Software PD_RESET bit. Enables or disables all out- 5 puts. RW (see Byte 0-Bit 6 and Bit 5 Functionality table) 4 Spread Select for 80MHz SS1 RW 3 Spread Select for 80MHz SS0 RW 2 OE for 66.66 MHz output RW 1 Reserved R 0 OE for single-ended 125MHz RW Power Up Condition 0 0 Output(s) Affected All 100MHz PCI- Express outputs PD_RESET, bit 5 1 All outputs Notes 0=spread off 1 = -0.5% down spread 0 = hardware cntl 1 = software ctrl 0 = disabled 1 = enabled 0 80M See Table 1 on Page4 1 1 66.66M 0 = disabled 1 = enabled -- - 1 Single-ended 125MHz 0 = disabled 1 = enabled 14-0209 5 www.pericom.com PI6C49018 Rev. A 12/10/2014 5 Page PI6C49018 Low Power Networking Clock Generator Application Notes Crystal circuit connection The following diagram shows PI6C49018 crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested to use C1= 27pF, C2= 27pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts. Crystal Oscillator Circuit SaRonix-eCera FL2500047 C1 27pF Crystal�(CL�=�18pF) XTAL_IN C2 27pF XTAL_OUT Recommended Crystal Specification Pericom recommends: a) FY2500081, SMD 5x3.2(4P), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf b) FL2500047, SMD 3.2x2.5(4P), 25M, CL=18pF, +/-20ppm, http://www.pericom.com/pdf/datasheets/se/FL.pdf 14-0209 11 www.pericom.com PI6C49018 Rev. A 12/10/2014 11 Page

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