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PDF MCP2022A Data sheet ( Hoja de datos )

Número de pieza MCP2022A
Descripción LIN Transceiver
Fabricantes Microchip 
Logotipo Microchip Logotipo



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MCP2021A/2A
LIN Transceiver with Voltage Regulator
Features:
• The MCP2021A/2A are compliant with LIN Bus
Specifications Version 1.3, 2.1 and with SAE
J2602-2
• Support Baud Rates up to 20 kBaud
• 43V Load Dump Protected
• Maximum Continuous Input Voltage: 30V
• Wide LIN-Compliant Supply Voltage: 6.0 – 18.0V
• Extended Temperature Range: -40 to +125°C
• Interface to PIC® MCU EUSART and Standard
USARTs
• Wake-Up on LIN Bus Activity or Local Wake Input
• Local Interconnect Network (LIN) Bus Pin:
- Internal Pull-Up Termination Resistor and
Diode for Slave Node
- Protected Against VBAT Shorts
- Protected Against Loss of Ground
- High-Current Drive
• TXD and LIN Bus Dominant Time-Out Function
• Two Low-Power Modes:
- Transmitter Off: 90 µA (typical)
- Power Down: 4.5 µA (typical)
• Output Indicating Internal Reset State (POR or
Sleep Wake)
• MCP2021A/2A On-Chip Voltage Regulator:
- Output Voltage of 5.0V or 3.3V
at 70 mA Capability with Tolerances of ±3%
Over the Temperature Range
- Internal Short Circuit Current Limit
- External Components Limited to Filter
Capacitor and Load Capacitor
• Automatic Thermal Shutdown
• High Electromagnetic Immunity (EMI), Low
Electromagnetic Emission (EME)
• Robust ESD Performance: ±15 kV for LBUS and
VBB pin (IEC61000-4-2)
• Transient Protection for LBUS and VBB Pins in
Automotive Environment (ISO7637)
• Meets Stringent Automotive Design
Requirements, including “OEM Hardware
Requirements for LIN, CAN and FlexRay
Interfaces in Automotive Applications”, Version
1.2, March 2011
• Multiple Package Options, including Small
4x4 mm DFN Package
Description:
The MCP2021A/2A provide a bidirectional, half-duplex
communication physical interface to meet the LIN bus
specification Revision 2.1 and SAE J2602-2. The
devices incorporate a voltage regulator with 5V or 3.3V
at 70 mA regulated power supply output. The devices
have been designed to meet the stringent quiescent
current requirements of the automotive industry and
will survive +43V load dump transients and double
battery jumps.
Package Types
RXD
CS/LWAKE
VREG
TXD
MCP2021A
PDIP, SOIC
18
27
36
45
FAULT/TXE
VBB
LBUS
VSS
MCP2021A
4x4 DFN
RXD 1
CS/LWAKE 2
VREG 3
TXD 4
8 FAULT/TXE
EP 7 VBB
9 6 LBUS
5 VSS
MCP2022A
PDIP, SOIC, TSSOP
RXD
CS/LWAKE
VREG
TXD
RESET
NC
NC
1
2
3
4
5
6
7
14 FAULT/TXE
13 VBB
12 LBUS
11 VSS
10 NC
9 NC
8 NC
* Includes Exposed Thermal Pad (EP), see Table 1-2.
2012-2014 Microchip Technology Inc.
DS20002298C-page 1

1 page




MCP2022A pdf
MCP2021A/2A
TABLE 1-1: OVERVIEW OF OPERATIONAL MODES
State
Transmitter Receiver
Internal
Wake
Module
Voltage
Regulator
Operation
Comments
POR
Ready
Operation
OFF
OFF
ON
OFF
ON
ON
OFF
OFF
OFF
OFF
ON
ON
Proceed to Ready mode after
VBB > VON
If CS/LWAKE is high, then proceed to
Operation or Transmitter Off mode.
If CS/LWAKE is low, then proceed to
Power-Down mode.
If FAULT/TXE is low, then proceed to
Transmitter Off mode.
Bus Off
state
Normal
Operation
mode
Power-Down
OFF
OFF
ON
Activity
Detect
OFF
On LIN bus rising edge or CS/LWAKE Lowest
high level, go to Ready mode.
power mode
Transmitter Off OFF
ON OFF
ON If CS/LWAKE is low, then proceed to Bus Off
Power-Down mode.
state,
If FAULT/TXE is high, then proceed to lower power
Operation mode.
mode
2012-2014 Microchip Technology Inc.
DS20002298C-page 5

5 Page





MCP2022A arduino
1.5 Optional External Protection
1.5.1 REVERSE BATTERY PROTECTION
An external reverse-battery-blocking diode should be
used to provide polarity protection (see Figure 1-7).
1.5.2
TRANSIENT VOLTAGE
PROTECTION (LOAD DUMP)
An external 43V transient suppressor (TVS) diode,
between VBB and ground, with a transient protection
resistor (RTP) in series with the battery supply and the
VBB pin, protects the device from power transients and
ESD events greater than 43V (see Figure 1-7). The
maximum value for the RTP protection resistor depends
upon two parameters: the minimum voltage the part will
start at and the impacts of this RTP resistor on the VBB
value, thus on the bus recessive level and slopes.
This leads to a set of three equations to fulfill.
Equation 1-1 provides a maximum RTP value
according to the minimum battery voltage the user
wants.
Equation 1-2 provides a maximum RTP value
according to the maximum error on the recessive level,
thus VBB, since the part uses VBB as the reference
value for the recessive level.
Equation 1-3 provides a maximum RTP value
according to the maximum relative variation the user
can accept on the slope when IREG varies.
Since both Equations 1-1 and 1-2 must be fulfilled, the
maximum allowed value for RTP is thus the smaller of
the two values found when solving Equations 1-1
and 1-2.
Usually Equation 1-1 gives the higher constraint
(smaller value) for RTP, as shown in the following
example where VBATmin is 8V.
However, the user needs to check that the value found
with Equation 1-1 fulfills Equations 1-2 and 1-3.
While this protection is optional, it should be
considered as good engineering practice.
EQUATION 1-1:
RTP -V---B----A---2T---5m---0-i-n--m----A---5---.-5---V--
5.5V = VOFF + 1.0V
Where:
250 mA = Peak current at power-on when
VBB = 5.5V
Assume VBATmin = 8V. Equation 1-1 shows 10
MCP2021A/2A
EQUATION 1-2:
RTP  ----V--I--RR---E-E--C-G---E-M--S--A-S--X-I--V---E-
Where:
VRECESSIVE = Maximum variation tolerated on
the recessive level
Assume VRECESSIVE = 1V and IREGMAX = 50 mA.
Equation 1-2 shows 20.
EQUATION 1-3:
Where:
RTP  ----S----l--o---p---e-----I--R---E--V--G--B-M--A---AT---Xm----i-n---------1---V-----
Slope = Maximum variation tolerated on the
slope level
IREGMAX = Maximum current the current will
provide to the load
VBATmin > VOFF + 1.0V
Assume Slope = 15%, VBATMIN = 8V
IREGMAX = 50 mA. Equation 1-2 shows 20.
and
1.5.3 CBAT CAPACITOR
Selecting CBAT = 10 x CREG is recommended.
However, this leads to a high value capacitor. Lower
values for CBAT capacitor can be used with respect to
some rules. In any case, the voltage at the VBB pin
should remain above VOFF when the device is turned
on.
The current peak at start-up (due to the fast charge of
the CREG and CBAT capacitors) may induce a
significant drop on the VBB pin. This drop is
proportional to the impedance of the VBAT connection
(see Figure 1-7).
The VBAT connection is mainly inductive and resistive.
Therefore, it can be modeled as a resistor (RTOT) in
series with an inductor (L). RTOT and L can be
measured.
The following formula gives an indication of the
minimum value of CBAT using RTOT and L:
EQUATION 1-4:
Where:
-C----B---A----T- =
CREG
1-1---0-+--0---L-L---22----++-----R-R-------T2-T-2----OO--------TT---
100
L = Inductor (measured in mH)
RTOT = RLINE + RTP (measured in )
2012-2014 Microchip Technology Inc.
DS20002298C-page 11

11 Page







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