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PDF AK4425A Data sheet ( Hoja de datos )
| Número de pieza | AK4425A | |
| Descripción | 192kHz 24-Bit Stereo DAC | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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[AK4425A]
AK4425A
192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output
GENERAL DESCRIPTION
The AK4425A is a 5V 24-bit stereo DAC with an integrated 2Vrms output buffer. A charge pump in the
buffer develops an internal negative power supply rail that enables a ground-referenced 2Vrms output.
Using AKM’s multi bit modulator architecture, the AK4425A delivers a wide dynamic range while
preserving linearity for improved THD+N performance. The AK4425A integrates a combination of
switched-capacitor and continuous-time filters, increasing performance for systems with excessive clock
jitter. The 24-bit word length and 192kHz sampling rate make this part ideal for a wide range of consumer
audio applications, such as DVD, AV receiver system and set-top boxes. The AK4425A is offered in a
space saving 16pin TSSOP package.
FEATURES
Sampling Rate Ranging from 8kHz to 192kHz
128 times Oversampling (Normal Speed Mode)
64 times Oversampling (Double Speed Mode)
32 times Oversampling (Quad Speed Mode)
24-Bit 8 times FIR Digital Filter
Switched-Capacitor Filter with High Tolerance to Clock Jitter
Single Ended 2Vrms Output Buffer
Digital De-emphasis Filter: 32kHz, 44.1kHz or 48kHz
Soft mute
Digital Attenuator (Linear 256 Step)
Control I/F: 3-wire
Audio I/F format: 24Bit MSB justified, 24/20/16 LSB justified or
I2S compatible
Master clock: 256fs, 384fs, 512fs, 768fs or 1152fs (Normal Speed Mode)
128fs, 192fs, 256fs or 384fs (Double Speed Mode)
128fs, 192fs (Quad Speed Mode)
THD+N: -91dB
Dynamic Range: 106dB
Automatic Power-on Reset Circuit
Power supply: +4.5 ∼ +5.5V
Ta = -20 to 85°C
Small Package: 16pin TSSOP (6.4mm x 5.0mm)
MS1127-E-01
-1-
2011/03
1 page  
[AK4425A]
ABSOLUTE MAXIMUM RATINGS
(VSS1=VSS2=0V; Note 1)
Parameter
Symbol
min
Power Supply
VDD
-0.3
CVDD
-0.3
Input Current (any pins except for supplies)
IIN
-
Input Voltage
VIND
-0.3
Ambient Operating Temperature
Ta -20
Storage Temperature
Tstg -65
Note 1. All voltages with respect to ground.
Note 2. VSS1, VSS2 connect to the same analog ground.
max
+6.0
+6.0
±10
VDD+0.3
85
150
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(VSS1=VSS2=0V; Note 1)
Parameter
Symbol min typ
Power Supply
VDD
+4.5 +5.0
AVDD
VDD
Note 3. AVDD should be equal to VDD
*AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
max
+5.5
Units
V
V
mA
V
°C
°C
Units
V
MS1127-E-01
-5-
2011/03
5 Page 
[AK4425A]
OPERATION OVERVIEW
■ System Clock
The external clocks required to operate the AK4425A are MCLK, LRCK and BICK. The master clock (MCLK) should be
synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation filter and the
delta-sigma modulator. The MCLK is used to operate the digital interpolation filter and the delta-sigma modulator. There
are two methods to set MCLK frequency. In Manual Setting Mode (ACKS = “0”: Register 00H), the sampling speed is set
by DFS0/1 (Table 1). The frequency of MCLK at each sampling speed is set automatically. (Table 2) When the power
applied, the AK4425A is in Auto Setting Mode. In Auto Setting Mode (ACKS = “1”: Default), as MCLK frequency is
detected automatically (Table 3), and the internal master clock becomes the appropriate frequency (Table 4), it is not
necessary to set DFS0/1.
The AK4425A is automatically placed in power saving mode when MCLK, LRCK and BICK stop during normal
operation mode, and the analog output is forced to 0V(typ). When MCLK, LRCK and BICK are input again, the
AK4425A is powered up. After power-up, the AK4425A is in the power-down mode until MCLK, LRCK and BICK are
input.
DFS1 DFS0
Sampling Rate (fs)
0
0 Normal Speed Mode
8kHz~48kHz
0 1 Double Speed Mode 60kHz~96kHz
1
0
Quad Speed Mode
120kHz~192kHz
Table 1. Sampling Speed (Manual Setting Mode)
(default)
DFS1
0
0
0
0
0
1
1
DFS0
Sampling
Speed
0
0 Normal
0
1 Double
1
0 Quad
0
LRCK
(kHz)
fs
32.0
44.1
48.0
88.2
96.0
176.4
192.0
MCLK (MHz)
128fs 192fs 256fs 384fs
- - 8.1920 12.2880
- - 11.2896 16.9344
- - 12.2880 18.4320
11.2896 16.9344 22.5792 33.8688
12.2880 18.4320 24.5760 36.8640
22.5792 33.8688
-
-
24.5760 36.8640
-
-
Table 2. System Clock Example
512fs
16.3840
22.5792
24.5760
-
-
-
-
768fs
24.5760
33.8688
36.8640
-
-
-
-
1152fs
36.8640
-
-
-
-
-
-
BICK
(MHz)
64fs
2.0480
2.8224
3.0720
5.6448
6.1440
11.2896
12.2880
MCLK
Sampling Speed
1152fs
Normal (fs=32kHz only)
512fs
768fs
Normal
256fs
384fs
Double
128fs
192fs
Quad
Table 3. Sampling Speed(Auto Setting Mode: Default)
MS1127-E-01
- 11 -
2011/03
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet AK4425A.PDF ] | |
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