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PDF AK4103A Data sheet ( Hoja de datos )

Número de pieza AK4103A
Descripción 192kHz 24-Bit DIT
Fabricantes Asahi Kasei Microsystems 
Logotipo Asahi Kasei Microsystems Logotipo



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No Preview Available ! AK4103A Hoja de datos, Descripción, Manual

[AK4103A]
AK4103A
192kHz 24-Bit DIT
GENERAL DESCRIPTION
The AK4103A is a digital audio transmitter (DIT) which supports data rate up to 192kHz sample rate
operation. The AK4103A supports AES3, IEC60958, S/PDIF & EIAJ CP1201 interface standards. The
AK4103A accepts audio data, auxiliary information data and etc, which is then biphase-encoded and
driven on to a cable. The audio serial port supports eight formats.
† Sampling Rate up to 192kHz
FEATURES
† Support AES3, IEC60958, S/PDIF & EIAJ CP1201 professional and consumer formats
† Generates CRCC codes and parity bits
† On-chip RS422 line driver
† 16-byte on-chip buffer memory for Channel Status and User bits
† Supports synchronous/asynchronous access to Channel Status and User bits
† Supports multiple clock frequencies: 128fs, 256fs, 384fs and 512fs
† Supports Left/Right justified and I2S audio formats
† Easy to use 4 wire, Serial Host Interface
† Audio Routing Mode (Transparent Mode)
† Power supply: 4.75 to 5.25V
† TTL level I/F
† Small Package: 24pin VSOP
† Temperature range of - 40 to 85 °C
MS0251-E-01
-1-
2009/01

1 page




AK4103A pdf
[AK4103A]
ABSOLUTE MAXIMUM RATINGS
(VSS=0V; Note 3)
Parameter
Symbol
min
Power Supply
VDD
-0.3
Input Current (All pins except supply pins)
IIN
-
Input Voltage
VIND
-0.3
Ambient Operating Temperature
Ta -40
Storage Temperature
Tstg -65
max
6.0
±10
VDD+0.3
85
150
Note 3. All voltages with respect to ground.
WARNING: Operation at or beyond these limits may results in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Units
V
mA
V
°C
°C
(VSS=0V; Note 3)
Parameter
Power Supply
RECOMMENDED OPERATING CONDITIONS
Symbol
VDD
min
4.75
typ
5.0
*AKEMD assumes no responsibility for the usage beyond the conditions in this datasheet.
max Units
5.25 V
DC CHARACTERISTICS
(Ta=25°C; VDD=4.75~5.25V)
Parameter
Symbol
min
Power Supply Current (fs=108kHz, Note 4)
IDD
High-Level Input Voltage
VIH 2.4
Low-Level Input Voltage
VIL -
High-Level Output Voltage
(Except TXP/N pins: Iout=-400µA)
VOH VDD-1.0
(TXP/N pins:
Iout= -8mA)
Low-Level Output Voltage
(Except TXP/N pins: Iout= 400µA)
(TXP/N pins:
Iout= 8mA)
VOH
VOL
VOL
VDD-0.8
-
-
Input Leakage Current
Iin -
typ
6
-
-
-
-
-
-
-
max Units
15 mA
-V
0.8 V
-V
-V
0.4 V
0.6 V
±10 μA
Note 4. Power supply current (IDD) is 3mA(typ)@fs=48kHz and 9mA(typ)@fs=192kHz.
IDD increases by 20mA(typ) with professional output driver circuit.
IDD is 350μA(typ) if PDN pin = “L”, TRANS pin = “H” and all other input pins except internal pull-up/pull-
down pins are held to VSS.
MS0251-E-01
-5-
2009/01

5 Page





AK4103A arduino
[AK4103A]
2. Synchronous Mode (hardware controlled)
The AK4103A when configured in synchronous mode accepts 16 - 24 bit audio samples through the audio serial port
and provides dedicated pins for the control data and allows all channel status, user data and validity bits to be serially
input through port pins. This data is multiplexed, the parity bit generated, and the bit stream is biphase-mark encoded
and driven through an RS422 line driver.
2-1. Audio Routing Mode (Transparent Mode)
The AK4103A can be configured in audio routing mode (transparent mode) by ANS pin = TRANS pin = “H”. In this
mode, the channel status(C), user data(U) and validity(V) bits must pass through unaltered. The Block Start(B) signal is
configured as an input, allowing the transmit block structure to be slaved to the block structure of the receiver. The C,
U and V are now transmitted with the current audio sample. In audio routing mode, no CRCC bytes are generated and
C bits pass through unaltered. In audio routing mode, the FS0/CSN pin changes definition to AKMODE pin. When set
“H” the AK4103A can be configured directly with the AK4112B receiver. When set “L”, it may be used with other
non-AKM receivers. Setting the part with TRANS pin = “H” and ANS pin = “L” is illegal and places the chip into a
test mode.
Pin Modes
ANS TRANS Synchronous/Asynchronous
Audio Routing
LL
Asynchronous mode
Normal mode
LH
HL
HH
Synchronous mode
(Test mode)
Normal mode
Audio routing mode
Source for C, U and V bits
C Pin ORed Control Register
U Pin ORed Control Register
V Pin ORed Control Register
C,U and V pin
Table 2. Mode setting
BLS
C (or U,V)
C(R191) C(L0) C(R0) C(L1)
C(L31) C(R31) C(L32)
LRCK
(except I2S)
LRCK
(I2S)
SDTI
R191 L0 R0 L1
L31 R31
Figure 1. Audio routing mode timing (AKMODE pin = “0”)
L32
MS0251-E-01
- 11 -
2009/01

11 Page







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