|
|
PDF MB9BF216T Data sheet ( Hoja de datos )
| Número de pieza | MB9BF216T | |
| Descripción | Microcontroller | |
| Fabricantes | Spansion | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MB9BF216T (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
MB9B210T Series
32-bit ARM® Cortex®-M3 based Microcontroller
MB9BF216S/T, MB9BF217S/T, MB9BF218S/T
Data Sheet (Full Production)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Spansion Inc. deems the products to have been in sufficient production
volume such that subsequent versions of this document are not expected to change. However,
typographical or specification corrections, or modifications to the valid combinations offered may occur.
Publication Number MB9B210T-DS706-00015 Revision 3.0 Issue Date February 10, 2015
1 page  
DataSheet
Ethernet - MAC (Max 1 channel)
Compliant with IEEE802.3 specification
10Mbps / 100 Mbps data transfer rates supported
MII/RMII for external PHY device supported.
MII: Max 1channel
RMII: Max 1channel
Full-Duplex and Half-Duplex mode supported.
Wake-ON-LAN supported
Built-in dedicated descriptor-system DMAC
Built-in 2 Kbyte Transmit FIFO and 2 Kbyte Receive FIFO.
Compliant IEEE1558-2008 (PTP)
Multi-function Serial Interface (Max 8 channels)
4 channels with 16steps×9-bit FIFO (ch.4 to ch.7), 4 channels without FIFO (ch.0 to ch.3)
Operation mode is selectable from the followings for each channel.
UART
CSIO
LIN
I2C
[UART]
Full-duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)
Various error detect functions available (parity errors, framing errors, and overrun errors)
[CSIO]
Full-duplex double buffer
Built-in dedicated baud rate generator
Overrun error detect function available
[LIN]
LIN protocol Rev.2.1 supported
Full-duplex double buffer
Master/Slave mode supported
LIN break field generate (can be changed 13-16-bit length)
LIN break delimiter generate (can be changed 1-4-bit length)
Various error detect functions available (parity errors, framing errors, and overrun errors)
[I2C]
Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps) supported
DMA Controller (8 channels)
DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously.
8 independently configured and operated channels
Transfer can be started by software or request from the built-in peripherals
Transfer address area: 32 bit (4 Gbyte)
Transfer mode: Block transfer/Burst transfer/Demand transfer
Transfer data type: byte/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
February 10, 2015, MB9B210T-DS706-00015-3v0-E
3
5 Page 
Pin Assignment
FPT-176P-M07
DataSheet
(TOP VIEW)
VCC
PA0/RTO20_0/TIOA08_0/FRCK1_0
PA1/RTO21_0/TIOA09_0/IC10_0
PA2/RTO22_0/TIOA10_0/IC11_0
PA3/RTO23_0/TIOA11_0/IC12_0
PA4/RTO24_0/TIOA12_0/IC13_0/INT03_0
PA5/RTO25_0/TIOA13_0/INT10_2
P05/TRACED0/TIOA05_2/SIN4_2/INT00_1
P06/TRACED1/TIOB05_2/SOT4_2/INT01_1
P07/TRACED2/ADTG_0/SCK4_2
P08/TRACED3/TIOA00_2/CTS4_2
P09/TRACECLK/TIOB00_2/RTS4_2/DTTI2X_0
P50/INT00_0/AIN0_2/SIN3_1/RTO10_0/IC20_0/MOEX_0
P51/INT01_0/BIN0_2/SOT3_1/RTO11_0/IC21_0/MWEX_0
P52/INT02_0/ZIN0_2/SCK3_1/RTO12_0/IC22_0/MDQM0_0
P53/SIN6_0/TIOA01_2/INT07_2/RTO13_0/IC23_0/MDQM1_0
P54/SOT6_0/TIOB01_2/RTO14_0/MALE_0
P55/SCK6_0/ADTG_1/RTO15_0/MRDY_0
P56/SIN1_0/INT08_2/TIOA09_2/DTTI1X_0/MNALE_0
P57/SOT1_0/TIOB09_2/INT16_1/MNCLE_0
P58/SCK1_0/TIOA11_2/INT17_1/MNWEX_0
P59/SIN7_0/TIOB11_2/INT09_2/MNREX_0
P5A/SOT7_0/TIOA13_1/INT18_1/MCSX0_0
P5B/SCK7_0/TIOB13_1/INT19_1/MCSX1_0
P5C/TIOA06_2/INT28_0/IC20_1
P5D/TIOB06_2/INT29_0/DTTI2X_1
VSS
P30/AIN0_0/TIOB00_1/INT03_2
P31/BIN0_0/TIOB01_1/SCK6_1/INT04_2
P32/ZIN0_0/TIOB02_1/SOT6_1/INT05_2
P33/INT04_0/TIOB03_1/SIN6_1/ADTG_6
P34/FRCK0_0/TIOB04_1
P35/IC03_0/TIOB05_1/INT08_1
P36/IC02_0/SIN5_2/INT09_1/TIOA12_2/MCSX2_0
P37/IC01_0/SOT5_2/INT10_1/TIOB12_2/MCSX3_0
P38/IC00_0/SCK5_2/INT11_1/MCLKOUT_0
P39/DTTI0X_0/ADTG_2
P3A/RTO00_0/TIOA00_1
P3B/RTO01_0/TIOA01_1
P3C/RTO02_0/TIOA02_1
P3D/RTO03_0/TIOA03_1
P3E/RTO04_0/TIOA04_1
P3F/RTO05_0/TIOA05_1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
LQFP - 176
132 VSS
131 P83/UDP1
130 P82/UDM1
129 USBVCC1
128 PF6/FRCK2_0/NMIX
127 P20/INT05_0/CROUT_0/UHCONX1/AIN1_1/MAD18_0
126 P21/SIN0_0/INT06_1/BIN1_1
125 P22/AN31/SOT0_0/TIOB07_1/ZIN1_1
124 P23/AN30/SCK0_0/TIOA07_1/RTO00_1
123 P24/AN29/SIN2_1/INT01_2/RTO01_1/MAD17_0
122 P25/AN28/SOT2_1/RTO02_1/MAD16_0
121 P26/AN27/SCK2_1/RTO03_1/MAD15_0
120 P27/AN26/INT02_2/RTO04_1/MAD14_0
119 P28/AN25/ADTG_4/INT09_0/RTO05_1/MAD13_0
118 P29/AN24/MAD12_0
117 PB7/AN23/TIOB12_1/INT23_0/ZIN2_2
116 PB6/AN22/TIOA12_1/SCK0_2/INT22_0/BIN2_2
115 PB5/AN21/TIOB11_1/SOT0_2/INT21_0/AIN2_2
114 PB4/AN20/TIOA11_1/SIN0_2/INT20_0
113 PB3/AN19/TIOB10_1/INT19_0
112 PB2/AN18/TIOA10_1/SCK7_2/INT18_0
111 PB1/AN17/TIOB09_1/SOT7_2/INT17_0
110 PB0/AN16/TIOA09_1/SIN7_2/INT16_0
109 VSS
108 AVSS
107 AVRH
106 AVCC
105 P1F/AN15/ADTG_5/INT29_1/TIOB15_2/FRCK0_1/MAD11_0
104 P1E/AN14/RTS4_1/INT28_1/TIOA15_2/DTTI0X_1/MAD10_0
103 P1D/AN13/CTS4_1/INT27_1/TIOB14_2/IC03_1/MAD09_0
102 P1C/AN12/SCK4_1/INT26_1/TIOA14_2/IC02_1/MAD08_0
101 P1B/AN11/SOT4_1/INT25_1/TIOB13_2/IC01_1/MAD07_0
100 P1A/AN10/SIN4_1/INT05_1/TIOA13_2/IC00_1/MAD06_0
99 P19/AN09/SCK2_2/INT22_1/MAD05_0
98 P18/AN08/SOT2_2/INT21_1/MAD04_0
97 P17/AN07/SIN2_2/INT04_1/MAD03_0
96 P16/AN06/SCK0_1/INT20_1/MAD02_0
95 P15/AN05/SOT0_1/IC03_2/MAD01_0
94 P14/AN04/SIN0_1/INT03_1/IC02_2/MAD00_0
93 P13/AN03/SCK1_1/IC01_2/MCSX4_0
92 P12/AN02/SOT1_1/IC00_2/MCSX5_0
91 P11/AN01/SIN1_1/INT02_1/FRCK0_2/MCSX6_0
90 P10/AN00/MCSX7_0
89 VCC
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
TIOA09_0, TIOA09_1, and TIOA09_2 cannot be used as the external startup trigger input (TGIN signal) at
I/O mode 1 (timer full mode) of the Base Timer. See "●Base Timer" in "Handling Devices" for details.
February 10, 2015, MB9B210T-DS706-00015-3v0-E
9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB9BF216T.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MB9BF216S | Microcontroller | Spansion |
| MB9BF216T | Microcontroller | Spansion |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |