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PDF MB9AB40NB Data sheet ( Hoja de datos )
| Número de pieza | MB9AB40NB | |
| Descripción | Microcontroller | |
| Fabricantes | Spansion | |
| Logotipo |  |
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MB9AB40NB Series
32-bit ARM® Cortex®-M3 based Microcontroller
MB9AFB41LB/MB/NB, MB9AFB42LB/MB/NB,
MB9AFB44LB/MB/NB
Data Sheet (Full Production)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Spansion Inc. deems the products to have been in sufficient production
volume such that subsequent versions of this document are not expected to change. However,
typographical or specification corrections, or modifications to the valid combinations offered may occur.
Publication Number MB9AB40NB_DS706-00034 Revision 4.0 Issue Date June 10, 2015
1 page  
DataSheet
LCD Controller (LCDC)
Up to 40 SEG × 8 COM
8 COM or 4 COM mode can be selected.
Built-in internal dividing resistor
LCD drive power supply (bias) pin (VV4 to VV0)
With blinking function
Multi-function Serial Interface (Max 8channels)
4 channels with 16steps×9-bit FIFO (ch.4 to ch.7), 4 channels without FIFO (ch.0 to ch.3)
Operation mode is selectable from the followings for each channel.
UART
CSIO
I2C
[UART]
Full-duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Hardware Flow control* : Automatically control the transmission by CTS/RTS (only ch.4)
Various error detection functions available (parity errors, framing errors, and overrun errors)
* : MB9AFB41LB, FB42LB and FB44LB do not support Hardware Flow control.
[CSIO]
Full-duplex double buffer
Built-in dedicated baud rate generator
Overrun error detection function available
[I2C]
Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps) supported
DMA Controller (8 channels)
The DMA Controller has an independent bus from the CPU, so CPU and DMA Controller can process
simultaneously.
8 independently configured and operated channels
Transfer can be started by software or request from the built-in peripherals
Transfer address area: 32-bit (4 Gbytes)
Transfer mode: Block transfer/Burst transfer/Demand transfer
Transfer data type: byte/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
A/D Converter (Max 24 channels)
[12-bit A/D Converter]
Successive Approximation type
Built-in 2units
Conversion time: 2.0 μs @ 2.7 V to 3.6 V
Priority conversion available (priority at 2levels)
Scanning conversion mode
Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion:
4 steps)
June 10, 2015, MB9AB40NB_DS706-00034-4v0-E
3
5 Page 
Pin Assignment
FPT-100P-M23
DataSheet
(TOP VIEW)
VCC
P50/INT00_0/SIN3_1/VV4/MADATA00_1
P51/INT01_0/SOT3_1/VV3/MADATA01_1
P52/INT02_0/SCK3_1/VV2/MADATA02_1
P53/SIN6_0/TIOA1_2/INT07_2/VV1/MADATA03_1
P54/SOT6_0/TIOB1_2/VV0/MADATA04_1
P55/SCK6_0/ADTG_1/SEG39/MADATA05_1
P56/INT08_2/SEG38/MADATA06_1
P30/TIOB0_1/INT03_2/COM7/MADATA07_1
P31/TIOB1_1/SCK6_1/INT04_2/COM6/MADATA08_1
P32/TIOB2_1/SOT6_1/INT05_2/COM5/MADATA09_1
P33/INT04_0/TIOB3_1/SIN6_1/ADTG_6/COM4/MADATA10_1
P34/TIOB4_1/MADATA11_1
P35/TIOB5_1/INT08_1/MADATA12_1
P36/SIN5_2/INT09_1/MADATA13_1
P37/SOT5_2/INT10_1/MADATA14_1
P38/SCK5_2/INT11_1/MADATA15_1
P39/ADTG_2/COM3
P3A/TIOA0_1/RTCCO_2/SUBOUT_2/COM2
P3B/TIOA1_1/COM1
P3C/TIOA2_1/COM0
P3D/TIOA3_1/SEG37
P3E/TIOA4_1/SEG36
P3F/TIOA5_1/SEG35
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
LQFP - 100
75 VSS
74 P20/AN19/INT05_0/CROUT_0/SEG10/MAD24_1
73 P21/AN18/SIN0_0/INT06_1/WKUP2/SEG11
72 P22/AN17/SOT0_0/TIOB7_1/SEG12
71 P23/AN16/SCK0_0/TIOA7_1/SEG13
70 P1F/AN15/ADTG_5/MAD23_1
69 P1E/AN14/RTS4_1/SEG14/MAD22_1
68 P1D/AN13/CTS4_1/SEG15/MAD21_1
67 P1C/AN12/SCK4_1/SEG16/MAD20_1
66 P1B/AN11/SOT4_1/SEG17/MAD19_1
65 P1A/AN10/SIN4_1/INT05_1/SEG18/MAD18_1
64 P19/AN09/SCK2_2/SEG19/MAD17_1
63 P18/AN08/SOT2_2/SEG20/MAD16_1
62 AVSS
61 AVRH
60 AVCC
59 P17/AN07/SIN2_2/INT04_1/SEG21/MAD15_1
58 P16/AN06/SCK0_1/SEG22/MAD14_1
57 P15/AN05/SOT0_1/SEG23/MAD13_1
56 P14/AN04/SIN0_1/INT03_1/SEG24/MAD12_1
55 P13/AN03/SCK1_1/RTCCO_1/SUBOUT_1/SEG25/MAD11_1
54 P12/AN02/SOT1_1/SEG26/MAD10_1
53 P11/AN01/SIN1_1/INT02_1/WKUP1/SEG27/MAD09_1
52 P10/AN00/SEG28
51 VCC
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
June 10, 2015, MB9AB40NB_DS706-00034-4v0-E
9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB9AB40NB.PDF ] | |
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