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PDF MAX2769B Data sheet ( Hoja de datos )
| Número de pieza | MAX2769B | |
| Descripción | Universal GPS Receiver | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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EVALUATION KIT AVAILABLE
MAX2769B
Universal GPS Receiver
General Description
The MAX2769B is a next-generation Global Navigation
Satellite System (GNSS) receiver covering GPS, GLONASS,
Galileo, and Compass navigation satellite systems on
a single chip. This single-conversion GNSS receiver is
designed to provide high performance for industrial and
automotive applications.
Designed on Maxim’s advanced, low-power SiGe BiCMOS
process technology, the MAX2769B offers the highest
performance and integration at a low cost. Incorporated
on the chip is the complete receiver chain, including a
dual-input LNA and mixer, followed by the image-rejected
filter, PGA, VCO, fractional-N frequency synthesizer,
crystal oscillator, and a multibit ADC. The total cascaded
noise figure of this receiver is as low as 1.4dB.
The MAX2769B completely eliminates the need for exter-
nal IF filters by implementing on-chip monolithic filters
and requires only a few external components to form a
complete low-cost GPS RF receiver solution.
The MAX2769B is the most flexible receiver on the mar-
ket. The integrated delta-sigma fractional-N frequency
synthesizer allows programming of the IF frequency
within a ±30Hz (fXTAL = 32MHz) accuracy while operat-
ing with any reference or crystal frequencies that are
available in the host system. The ADC outputs CMOS
logic levels with 1 or 2 quantized bits for both I and Q
channels, or up to 3 quantized bits for the I channel. I and
Q analog outputs are also available.
The MAX2769B is packaged in a 5mm x 5mm, 28-pin thin
QFN package with an exposed paddle.
Applications
Automotive Navigation Systems
Location-Enabled Mobile Handsets
PNDs (Personal Navigation Devices)
Telematics (Asset Tracking, Inventory
Management)
Marine/Avionics Navigation
Software GPS
Laptops and Netbooks
Features
S AEC-Q100 Automotive Qualified
S GPS/GLONASS/Galileo/Compass Systems
S 40pF Output Clock Drive Capability
S No External IF SAW or Discrete Filters Required
S Programmable IF Frequency
S Fractional-N Synthesizer with Integrated VCO
Supports Wide Range of Reference Frequencies
S Dual-Input Uncommitted LNA for Separate Passive
and Active Antenna Inputs
S 1.4dB Cascade Noise Figure
S Integrated Crystal Oscillator
S Integrated Active Antenna Sensor
S 2.7V to 3.3V Supply Voltage
S Small, 28-Pin, RoHS-Compliant, Thin QFN Lead-
Free Package (5mm x 5mm)
Ordering Information appears at end of data sheet.
Block Diagram
21 20 19 18 17 16 15
N.C. 22
14 VCCD
VCC_IF 23
IDLE 24
LNA2 25
PGM 26
MAX2769B
FILTER
LNA2
13 VCC_CP
12 CPOUT
VCO 11 VCC_VCO
10 CS
LNA1 27
LNA1
9 SCLK
N.C. 28 +
8 SDATA
1 234567
For related parts and recommended products to use with this part,
refer to www.maximintegrated.com/MAX2769B.related.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5875; Rev 2; 10/12
1 page  
MAX2769B
Universal GPS Receiver
Typical Operating Characteristics
(MAX2769B EV kit, VCC_ = 2.7V to 3.3V, TA = -40°C to +85NC, PGM = Ground. Registers are set to the default power-up states. LNA
input is driven from a 50I source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set
to 51dB gain by serial-interface word GAININ = 111010. Maximum IF output load is not to exceed 10kI||7.5pF on each pin. Typical
values are at VCC_ = 2.85V and TA = +25NC, unless otherwise noted.)
CASCADED RECEIVER GAIN
vs. PGA GAIN CODE
120
TA = -40°C
100
TA = +25°C
80
TA = +85°C
60
40
0 5 10 15 20 25 30 35 40 45 50 55 60 65
PGA GAIN CODE (DECIMAL FORMAT)
LNA1 GAIN AND NOISE FIGURE
vs. LNA1 BIAS DIGITAL CODE
1.6 25MAX2769B toc04
1.4 GAIN
1.2
20
1.0 15
0.8
0.6
NOISE FIGURE
10
0.4
5
0.2
00
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
LNA BIAS DIGITAL CODE (DECIMAL)
CASCADED GAIN AND NOISE FIGURE
vs. TEMPERATURE
2.0 120MAX2769B toc02
1.5
AGC GAIN
115
110
1.0
NOISE FIGURE
105
100
0.5
95
0
-40
-15 10 35 60
TEMPERATURE (°C)
90
85
LNA1 |S21| AND |S12|
vs. FREQUENCY
40
30 |S21|
20
10
0
-10 |S12|
-20
-30
-40
-50
0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
FREQUENCY (GHz)
LNA1 GAIN AND NOISE FIGURE
vs. TEMPERATURE
1.4
LNA BIAS = 1000
1.2
MAX2769B toc05 19.6
19.4
19.2
1.0
19.0
0.8 18.8
0.6
0.4 NOISE FIGURE
0.2
GAIN
18.6
18.4
18.2
18.0
0
-40
-15 10 35 60
TEMPERATURE (°C)
17.8
85
LNA1 INPUT 1dB COMPRESSION POINT
vs. LNA1 BIAS DIGITAL CODE
5.0
2.5
0
-2.5
-5.0
-7.5
-10.0
-12.5
-15.0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
LNA BIAS DIGITAL CODE (DECIMAL)
Maxim Integrated
5
5 Page 
MAX2769B
Universal GPS Receiver
Pin Configuration
TOP VIEW
21 20 19 18 17 16 15
N.C. 22
VCC_IF 23
IDLE 24
LNA2 25
PGM 26
LNA1 27
N.C. 28
+
MAX2769B
EP
14 VCCD
13 VCC_CP
12 CPOUT
11 VCC_VCO
10 CS
9 SCLK
8 SDATA
1 234567
TQFN
Pin Description
PIN NAME
FUNCTION
1
ANTFLAG
Active Antenna Flag Logic Output. A logic-high indicates that an active antenna is connected to the
ANTBIAS pin.
2 LNAOUT LNA Output. The LNA output is internally matched to 50I.
3 ANTBIAS Buffered Supply Voltage Output. Provides a supply voltage bias for an external active antenna.
4
VCC_RF
RF Section Supply Voltage. Bypass to ground with 100nF and 100pF capacitors in parallel as close
as possible to the pin.
5 MIXIN Mixer Input. The mixer input is internally matched to 50I.
6 LD Lock-Detector CMOS Logic Output. A logic-high indicates the PLL is locked.
7 SHDN Operation Control Logic Input. A logic-low shuts off the entire device.
8 SDATA Data Digital Input of 3-Wire Serial Interface
9
SCLK
Clock Digital Input of 3-Wire Serial Interface. Active when CS is low. Data is clocked in on the rising
edge of the SCLK.
Maxim Integrated
11
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| PDF Descargar | [ Datasheet MAX2769B.PDF ] | |
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