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PDF HMC221B Data sheet ( Hoja de datos )

Número de pieza HMC221B
Descripción SPDT Switch
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
FEATURES
Low insertion loss: 0.4 dB typical
Input third-order intercept (IP3): 55 dBm typical
Positive control: 0 V/3 V
Ultrasmall package: SOT-23
APPLICATIONS
Industrial, scientific and medical (ISM)
PCMCIA wireless cards
Cellular applications
GENERAL DESCRIPTION
The HMC221B is a single-pole, double-throw (SPDT) switch
specified from 10 kHz to 3 GHz in a 6-lead SOT-23 plastic package.
This switch offers a very low insertion loss of less than 0.8 dB
up to 3 GHz and is well suited for receiver and filter switching
applications that require low insertion loss and a small size.
The RF1 and RF2 pins are reflective shorts when in an off state,
and the two control voltages (the A and B pins) require a minimal
dc bias current. Note that the HMC197B exhibits a similar
performance in an alternate pinout.
GaAs, MMIC, SPDT Switch,
10 kHz to 3 GHz
HMC221B
FUNCTIONAL BLOCK DIAGRAM
A RFC B
654
HMC221B
123
RF2 GND RF1
Figure 1.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2015–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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HMC221B pdf
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RF2 1
HMC221B
TOP VIEW
(Not to Scale)
6A
GND 2
5 RFC
RF1 3
4B
Figure 2. Pin Configuration
HMC221B
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 RF2
RF2 Port (See Figure 4). This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required.
2
GND
Ground (See Figure 6). This pin must be connected to the RF/dc ground of the printed circuit board (PCB).
3 RF1
RF1 Port (See Figure 4). This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required.
4B
Control Input A (See Table 4 and Figure 5).
5 RFC RF Common Port (See Figure 3). This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required.
6A
Control Input B (See Table 4 and Figure 5).
Table 4. Truth Table
Control Input Voltage1
A (V dc)
B (V dc)
Low High
High
Low
RFC to RF1
On
Off
Signal Path State
RFC to RF2
Off
On
1 All high or all low for control inputs, A and B, are undefined states. The switch response has a high insertion loss and poor return loss on both RF paths.
INTERFACE SCHEMATICS
RFC
Figure 3. RFC Interface
RF1, RF2
A, B
Figure 5. A and B Interface
GND
Figure 4. RF1 and RF2 Interface
Figure 6. GND Interface
Rev. A | Page 5 of 9

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