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PDF RP6101 Data sheet ( Hoja de datos )
| Número de pieza | RP6101 | |
| Descripción | 5V/12V Synchronous Buck PWM DC-DC Controller | |
| Fabricantes | RICHPOWER | |
| Logotipo |  |
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Preliminary
RP6101
5V/12V Synchronous Buck PWM DC-DC Controller
General Description
The RP6101 is a high efficiency synchronous buck PWM
controllers that generate logic-supply voltages in PC based
systems. These high performance , single output devices
include internal soft-start, frequency compensation
networks and integrates all of the control, output
adjustment, monitoring and protection functions into a
single package.
The device operating at fixed 300kHz frequency provides
an optimum compromise between efficiency, external
component size, and cost.
Adjustable over-current protection (OCP) monitors the
voltage drop across the RDS(ON) of the lower MOSFET for
synchronous buck PWM DC-DC controller. The over-
current function cycles the soft-start in 4-times hiccup
mode to provide fault protection, and in an always hiccup
mode for under-voltage protection.
Ordering Information
RP6101
Package Type
S : SOP-8
Operating Temperature Range
G : Green (Halogen Free with Commer-
cial Standard)
Features
z Operating with 5V or 12V Supply Voltage
z Drives All Low Cost N-MOSFETs
z Voltage Mode PWM Control
z 300kHz Fixed Frequency Oscillator
z Fast Transient Response :
` High-Speed GM Amplifier
` Full 0 to 100% Duty Ratio
z Internal Soft-Start
z Adaptive Non-Overlapping Gate Driver
z Over-Current Fault Monitor on MOSFET, No Current
Sense Resistor Required
z Full-Time Over Voltage Protection
z RoHS Compliant and Halogen Free
Applications
z Graphic Card
z Motherboard, Desktop Servers
z IA Equipments
z Telecomm Equipments
z High Power DC-DC Regulators
Pin Configurations
(TOP VIEW)
Note :
Richpower Green products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
BOOT
UGATE
GND
LGATE
2
3
4
8 PHASE
7 OPS
6 FB
5 VCC
SOP-8
RP6101-00P May 2009
1
1 page  
Preliminary
RP6101
Par amet e r
Symbol
T est Conditions
Min Typ Max Units
Error Amplifier (GM)
E/A Transconductance
gm
Open Loop DC Gain
AO
PWM Controller Gate Drivers (VCC = 12V)
Upper Gate Source
IUGATE
Upper Gate Sink
RUGATE
Lower Gate Source
Lower Gate Sink
ILGATE
RLGATE
Pr otec tion
FB Under-Voltage Trip
Δ FBUVT
OC Current Source
IOC
Pre-OVP Threshold (Before POR) VOVP1
OVP Threshold (After POR)
Soft-Start Interval
VOV P2
TSS
VBOOT − VPHASE = 12V,
VUGATE − VPHASE = 6V
VBOOT − VPHASE = 12V,
VUGATE − VPHASE = 1V
VCC = 12V, VLGATE = 6V
VCC = 12V, VLGATE = 1V
FB Falling
VPHASE = 0V
VCC = 3V, Sw eep VFB
VCC = 5V, Sw eep VFB
-- 0.2 -- ms
-- 90 -- dB
0.6 1 -- A
-- 4 8 Ω
0.6 1 -- A
-- 3 5 Ω
70 75 80 %
35 40 45 uA
-- 1.1 1.3 V
1 1.3 1.5 V
-- 3.5 -- ms
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution is recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
RP6101-00P May 2009
5
5 Page 
Preliminary
RP6101
Gain
(dB)
GM•R1•
(voltage
divider ration)
Compensator
FZ
FP
Freq.
(log scale)
FCROSS Close Loop
FLC FESR
Modulator
Figure 5. System Bode Plot
PCB Layout Considerations
PCB layout is critical to high-current high-frequency
switching converter design. A good layout can help the
controller to function properly and obtain better
performance. On the other hand, the circuit may have more
power loss, pool performance and even malfunction if
without a carefully layout. In order to obtain better
performance, the general guidelines of PCB layout are
listed as follows.
` Power stage components should be placed first. Place
the input bulk capacitors close to the high-side power
MOSFETs, and then locate the output inductor then
finally the output capacitors.
` Placing the ceramic capacitors physically close to the
drain of the high-side MOSFET. This can reduce the
input voltage drop when high-side MOSFET is turned
on.
` Keep the high-current loops as short as possible. The
current transition between MOSFETs usually causes
di/dt voltage spike due to the parasitic components on
PCB trace and component lead. Therefore, making the
trace length between power MOSFETs and inductors
wide and short can reduce the voltage spike and also
reduce EMI.
` Make MOSFET gate driver path as short as possible.
Since the gate driver uses high-current pulses to switch
on/off power MOSFET, the driver path must be short to
reduce the trace inductance. This is especially important
for low-side MOSFET because this can reduce the
possibility of shoot-through. Besides, also make the
width of gate driving path as wide as possible to reduce
the trace resistance.
` Provide enough copper area around power MOSFETs
to help heat dissipation. Using thick copper also
reduces the trace resistance and inductance to have
better performance.
` The output capacitors should be placed physically close
to the load. This can minimize the trace parasitic
components and improve transient response.
` The feedback voltage divider resistor must be placed
close to FB pin because it is noise-sensitive.
` ROCSET should be placed close to IC.
` The small signal MOSFET/BJT used to shutdown the
controller should be placed close to IC to minimize the
trace parasitic components.
` Voltage feedback path must away from switching
nodes. The switching nodes, such as the
interconnection between high-side MOSFET, low-side
MOSFET and inductor, is extremely noisy. Feedback
path must away from this kind of noisy node to avoid
noise pick-up.
` A multi-layer PCB design is recommended. Use one
single layer as the ground and have separate layers for
power rail or signal.
RP6101-00P May 2009
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet RP6101.PDF ] | |
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