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PDF MAX17000 Data sheet ( Hoja de datos )
| Número de pieza | MAX17000 | |
| Descripción | Complete DDR2 and DDR3 Memory Power-Management Solution | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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EVALUATION KIT AVAILABLE
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
General Description
The MAX17000 pulse-width modulation (PWM) con-
troller provides a complete power solution for notebook
DDR, DDR2, and DDR3 memory. It comprises a step-
down controller, a source/sink LDO regulator, and a ref-
erence buffer to generate the required VDDQ, VTT, and
VTTR rails.
The VDDQ rail is supplied by a step-down converter
using Maxim’s proprietary Quick-PWM™ controller. The
high-efficiency, constant-on-time PWM controller han-
dles wide input/output voltage ratios (low duty-cycle
applications) with ease and provides 100ns response
to load transients while maintaining a relatively constant
switching frequency. The Quick-PWM architecture cir-
cumvents the poor load-transient timing problems of
fixed-frequency current-mode PWMs while also avoid-
ing the problems caused by widely varying switching
frequencies in conventional constant-on-time and con-
stant-off-time PWM schemes. The controller senses the
current to achieve an accurate valley current-limit pro-
tection. It is also built in with overvoltage, undervoltage,
and thermal protections. The MAX17000 can be set to
run in three different modes: power-efficient SKIP
mode, low-noise forced-PWM mode, and standby
mode to support memory in notebook computer stand-
by operation. The switching frequency is programma-
ble from 200kHz to 600kHz to allow small components
and high efficiency. The VDDQ output voltage can be
set to a preset 1.8V or 1.5V, or be adjusted from 1.0V to
2.5V by an external resistor-divider. This output has 1%
accuracy over line-and-load operating range.
The MAX17000 includes a ±2A source/sink LDO regu-
lator for the memory termination VTT rail. This VTT regu-
lator has a ±5mV deadband that either sources or
sinks, ideal for the fast-changing load burst present in
memory termination applications. This feature also
reduces output capacitance requirements.
The VTTR reference buffer sources and sinks ±3mA,
providing the reference voltage needed by the memory
controller and devices on the memory bus.
The MAX17000 is available in a 24-pin, 4mm x 4mm,
TQFN package.
Applications
Notebook Computers
DDR, DDR2, and DDR3 Memory Supplies
SSTL Memory Supplies
Features
o SMPS Regulator (VDDQ)
Quick-PWM with 100ns Load-Step Response
Output Voltages—Preset 1.8V, 1.5V, or
Adjustable 1.0V to 2.5V
1% VOUT Accuracy Over Line and Load
26V Maximum Input Voltage Rating
Accurate Valley Current-Limit Protection
200kHz to 600kHz Switching Frequency
o Source/Sink Linear Regulator (VTT)
±2A Peak Source/Sink
Low-Output Capacitance Requirement
Output Voltages-Preset VDDQ/2 or REFIN
Adjustable from 0.5V to 1.5V
o Low Quiescent Current Standby State
o Soft-Start/Soft-Shutdown
o SMPS Power-Good Window Comparator
o VTT Power-Good Window Comparator
o Selectable Overvoltage Protection
o Undervoltage/Thermal Protections
o ±3mA Reference Buffer (VTTR)
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX17000ETG+
-40°C to +85°C
24 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration
TOP VIEW
18 17 16 15 14 13
VDD 19
12 CSL
PGND1 20
11 FB
AGND 21
SKIP 22
MAX17000ETG+
10 REFIN
9 VTTI
VCC 23
8 VTT
SHDN 24
7 PGND2
12 3 4 56
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
TQFN
4mm x 4mm
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-4125; Rev 2; 4/13
1 page  
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V, VCC = VDD = VSHDN = VREFIN = 5V, VCSL = 1.8V, STDBY = SKIP = AGND, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
CURRENT LIMIT
Valley Current-Limit Threshold
VLIMIT VCSH - VCSL
17 20 25 mV
Current-Limit Threshold
(Negative)
VNEG VCSH - VCSL, SKIP = VCC
-23 mV
Current-Limit Threshold
(Zero Crossing)
VZX VPGND1 - VLX
1 mV
SMPS GATE DRIVERS
DH Gate Driver On-Resistance
DL Gate Driver On-Resistance
RDH BST - LX forced to 5V
DL high
RDL
DL low
1.5 5.0
1.5 5.0
0.6 3.0
DH Gate Driver Source/
Sink Current
IDH DH forced to 2.5V, BST - LX forced to 5V
1
A
DL Gate Driver Source/
Sink Current
Dead Time
Internal BST Switch
On-Resistance
LX, BST Leakage Current
INPUTS AND OUTPUTS
IDL(SRC)
IDL(SNK)
tDEAD
RBST
DL forced to 2.5V
DL forced to 2.5V
DL rising, TA = +25°C
DL falling, TA = +25°C
IBST = 10mA,
VDD = 5V internal design target
VBST = VLX = 26V, SHDN = AGND,
TA = +25°C
1
3
10 25
15 35
4.5
0.001 20
A
ns
μA
Logic Input Threshold
SHDN, STDBY, SKIP, OVP, rising edge
hysteresis = 300mV/600mV (min/max)
1.30 1.65 2.00
V
Logic Input Current
Input Leakage Current
Input Bias Current
SKIP = AGND or VCC,
VCSH = 0V or VCC, TA = +25°C
VCSL = 0V or VCC
-1 +1 μA
-1 +1 μA
55 100 μA
Maxim Integrated
5
5 Page 
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
Typical Operating Characteristics (continued)
(MAX17000 Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, SKIP = GND, TA = +25°C, unless otherwise noted.)
VTT LOAD-TRANSIENT RESPONSE (SOURCE)
IVTT BETWEEN 10mA AND 1.5A
MAX17000 toc21
IVTT
VTT LOAD-TRANSIENT RESPONSE
(SINK)
MAX17000 toc22
IVTT
VTT_ac
VDDQ = 1.8V
IVTT : 1A/div
VTT : 20mV/div
20μs/div
VTT_ac
VDDQ = 1.8V
IVTT : 1A/div
VTT : 20mV/div
20μs/div
VTT LOAD-TRANSIENT RESPONSE
(SOURCE/SINK)
MAX17000 toc23
IVTT
VTT_ac
IVTT : 1A/div
VTT : 20mV/div
20μs/div
VDDQ = 1.8V
0.79
0.78
0.77
0.76
0.75
0.74
0.73
0.72
0.71
0.70
-6
VTTR OUTPUT VOLTAGE
vs. LOAD CURRENT
-4 -2 0
2
LOAD CURRENT (mA)
4
6
Maxim Integrated
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX17000.PDF ] | |
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