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PDF CS3002 Data sheet ( Hoja de datos )
| Número de pieza | CS3002 | |
| Descripción | Precision Low-voltage Amplifier | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS3002
Precision Low-voltage Amplifier; DC to 2kHz
Features & Description
• Low Offset: 10V Max
• Low Drift: 0.05V/°C Max
• Low Noise
- 6nV/ Hz @ 0.5Hz
- 0.1 to 10Hz = 125 nVpp
- 1/f corner @ 0.08Hz
• Open-loop Voltage Gain
- 300dB Typical
- 200dB Minimum
• Rail-to-rail Output Swing
• Slew Rate: 5V/s
Applications
• Thermocouple/Thermopile Amplifiers
• Load Cell and Bridge Transducer Amplifiers
• Precision Instrumentation
• Battery-powered Systems
Description
The CS3002 dual amplifier is designed for precision am-
plification of low-level signals and is ideally suited for
applications that require very high closed-loop gains.
These amplifiers achieve excellent offset stability, super-
high open-loop gain, and low noise over time and tem-
perature. The devices also exhibit excellent CMRR and
PSRR. The common mode input range includes the neg-
ative supply rail. The amplifiers operate with any total
supply voltage from 2.7V to 6.7V (±1.35V to ±3.35V).
Pin Configuration
CS3002
Out A 1
8 V+
-In A 2
+In A 3
-A+
+B -
7 Out B
6 -In B
V- 4
5 +In B
8-lead SOIC
Noise vs. Frequency (Measured)
100
10
1
0.001
0.01 0.1
Frequency (Hz)
1
Dexter Research
Thermophile 1M
R1
100
10
CS3002
R2
64.9k
C2
0.015F
Cirrus Logic, Inc.
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2012
(All Rights Reserved)
DEC ‘12
DS490F10
1 page  
CS3002
500
400
300
200
100
0
-100
-200
-300
-400
-500
1
GAIN
PHASE
10
100
1k
10k 100k 1M
10M
Frequency (Hz)
Figure 7. Open-loop Gain and Phase vs. Frequency
DS490F10
100
80
60
40
20
0
-45
-90
-135
-180
-225
-270
-315
-360
10K 100K 1M 10M
Figure 8. Open-loop Gain and Phase vs. Frequency (Expanded)
5
5 Page 
CS3002
3.2.2 Gain Calculation Recommendations
Condition 1: |Av| 50 and R1 100
The op amp is inherently stable for |Av| 50 and
R1 100. Capacitor C2 is not required for
compensation across resistor R2.
1) |Av| = 1 configuration has 70° phase margin and
20dB gain margin.
2) |Av| = 50 configuration has phase margin between
40° for CLOAD 100 pF and 60° for CLOAD 0pF.
Condition 2: |Av| 50 and R1 100
Compensation capacitor C2 across resistor R2 is
required. Calculate C2 using Equation 8:
C2 ---R-----1--R-----2--C-----i-n----
[Eq. 8]
where
Cin = 50pF
Condition 3: |Av| 50
Compensation capacitor C2 across resistor R2 is
required. Calculate and verify a value for C2 using the
following steps.
Calculate the Compensation Capacitor Value:
1) Calculate a value for C2 using Equation 9:
C2 = ---2----------R----1--------1-R-----2------------P----1----
[Eq. 9]
where
P1 = 1MHz
To simplify the calculation, set the pole of the filter to
P1 = 1MHz. Pole P1 must be set higher than the
op amp’s internal 50kHz crossover frequency.
2) Calculate a second value for C2 using Equation 10:
C2 ---R-----1--R-----2--C-----i-n----
[Eq. 10]
where
Cin = 50pF
3) Use the larger of the two values calculated in steps
1 and 2.
Verify the Op Amp Compensation:
Verify the op amp compensation using the open-loop
gain and phase response Bode plot in Figure 13. Plot
the calculated closed loop gain transfer function and
verify the following design criteria are met:
1) Pole P1 > op amp internal 50kHz crossover
frequency
P1 = 2----------R-----1--------1-R----2------------C-----2--
[Eq. 11]
where
P1 = 1MHz
To simplify the calculation, set the pole to P1 = 1MHz.
2) Z1 < op amp internal 50kHz crossover frequency
Z1 = 2----------R-----2-1---------C----2----
[Eq. 12]
3) Gain margin above the open-loop gain transfer
function is required. A gain margin of +20dB above
the open-loop gain transfer function is optimal.
DS490F10
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet CS3002.PDF ] | |
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