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Datasheet ZL38010 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | Category |
| 1 | ZL38010 | Low Power Quad ADPCM Transcoder
ZL38010 Low Power Quad ADPCM Transcoder
Data Sheet Features
• • Full duplex transcoder with four encode channels and four decode channels 32 kbps, 24 kbps and 16 kbps ADPCM coding complying with ITU-T (previously CCITT) G.726 (without 40 kbps), and ANSI T1.303-1989 Low power |  Zarlink Semiconductor | data |
ZL3 Datasheet ( Hoja de datos ) - resultados coincidentes |
| N.º | Número de pieza | Descripción | Fabricantes | Catagory |
| 1 | ZL30100 | T1/E1 System Synchronizer ZL30100 T1/E1 System Synchronizer
Data Sheet Features
• • • • • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces Simple hardware cont  Zarlink Semiconductor Inc data | | |
| 2 | ZL30101 | T1/E1 Stratum 3 System Synchronizer ZL30101 T1/E1 Stratum 3 System Synchronizer
Data Sheet Features
• • • • • Supports Telcordia GR-1244-CORE Stratum 3 Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces Simple hardware control interfa Zarlink Semiconductor Inc data | | |
| 3 | ZL30102 | T1/E1 Stratum 4/4E Redundant System Clock Synchronizer
ZL30102
T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110
Data Sheet Features
• Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock Supports Telcordia GR-1244-CORE Strat Zarlink Semiconductor data | | |
| 4 | ZL30105 | T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer
ZL30105
T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTCA™ and H.110
Data Sheet Features
• Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock Supports ITU-T G.813 option 1, G.823 for Zarlink Semiconductor data | | |
| 5 | ZL30106 | SONET/SDH/PDH Network Interface DPLL ZL30106 SONET/SDH/PDH Network Interface DPLL
Data Sheet Features
• • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH interfaces Accepts three input references and synch  Zarlink data | | |
| 6 | ZL30107 | GbE Line Card Synchronizer
ZL30107 GbE Line Card Synchronizer
Shortform Data Sheet
March 2007
A full Data Sheet is available to qualified customers. To register, please send an email to [email protected].
Ordering Information ZL30107GGG 64 Pin CABGA Trays ZL30107GGG2 64 Pin CABGA* Trays *Pb Free Zarlink Semiconductor data | | |
| 7 | ZL30108 | SONET/SDH Network Interface DPLL
ZL30108 SONET/SDH Network Interface DPLL
Data Sheet Features
• Supports output wander and jitter generation specifications for GR-253-CORE OC-3 and G.813 STM-1 SONET/SDH interfaces Accepts two input references and synchronizes to any combination of 2 kHz, 8 kHz, 1.544 MHz, 2.0 Zarlink Semiconductor data | | |
| 8 | ZL30109 | DS1/E1 System Synchronizer
ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output
Data Sheet Features
• • • • • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN Zarlink Semiconductor data | | |
| 9 | ZL30110 | Telecom Rate Conversion DPLL
ZL30110 Telecom Rate Conversion DPLL
Data Sheet Features
• • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 16.384 MHz Provides a range of output clocks: • • • 65.536 MHz TDM clock locked to the input reference General purpose 25 MHz fan-out to 6 outputs locked to the Zarlink Semiconductor data | |
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