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Descripción |
Fabr. |
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MAX394 |
Low-Voltage / Quad / SPDT / CMOS Analog Switch
19-0391; Rev 0; 5, 95
Low-Voltage, Quad, SPDT, CMOS Analog Switch
_______________General Description
The MAX394 is a precision, low-voltage, quad, singlepole, double-throw (SPDT) analog switch. The four independent switches operate with bipolar supplies ranging from ±2.7V to ±8V, or with a single supply of +2.7V to +15V. The MAX394 offers low on-resistance (less than 35Ω), guaranteed to match
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MAX3940 |
10Gbps EAM Driver
19-2730; Rev 0; 1, 03
10Gbps EAM Driver with Integrated Bias Network
General Description
The MAX3940 is designed to drive an electro-absorption modulator (EAM) at data rates up to 10.7Gbps. It incorporates the functions of a biasing circuit and a modulation circuit, with integrated control op amps externally programmed by DC voltages. The integrated bias circuit provides a programmable biasing c
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MAX3941 |
10Gbps EAM Driver with Integrated Bias Network
19-2935; Rev 0; 7, 03
10Gbps EAM Driver with Integrated Bias Network
General Description
The MAX3941 is designed to drive an electro-absorption modulator (EAM) at data rates up to 10.7Gbps. It incorporates the functions of a biasing circuit and a modulation circuit, with integrated control op amps externally programmed by DC voltages. The integrated bias circuit provides a programmable biasing cu
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MAX3941ETG |
10Gbps EAM Driver with Integrated Bias Network
19-2935; Rev 0; 7, 03
10Gbps EAM Driver with Integrated Bias Network
General Description
The MAX3941 is designed to drive an electro-absorption modulator (EAM) at data rates up to 10.7Gbps. It incorporates the functions of a biasing circuit and a modulation circuit, with integrated control op amps externally programmed by DC voltages. The integrated bias circuit provides a programmable biasing cu
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MAX3942 |
10Gbps Modulator Driver
19-2934; Rev 1; 6, 07
10Gbps Modulator Driver
General Description
The MAX3942 is designed to drive high-speed optical modulators at data rates up to 10.7Gbps. It functions as a modulation circuit, with an integrated control op amp externally programmed by a DC voltage. A high-bandwidth, fully differential signal path is internally implemented to minimize jitter accumulation. When a clock signal
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