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Datasheet IS61DDB22M36 Equivalent ( PDF )

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2 IS61DDB22M36   DDR-II (Burst of 2) CIO Synchronous SRAMs

72 Mb (2M x 36 & 4M x 18) . DDR-II (Burst of 2) CIO Synchronous SRAMs November 2009 Features • 2M x 36 or 4M x 18. • On-chip delay-locked loop (DLL) for wide data valid window. • Common data input/output bus. • Synchronous pipeline read with self-timed late write operation. • Double data
Integrated Silicon Solution
Integrated Silicon Solution
datasheet IS61DDB22M36 pdf
1 IS61DDB22M36A   72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM

IS61DDB24M18A IS61DDB22M36A 4Mx18, 2Mx36 72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM AUGUST 2014 FEATURES  2Mx36 and 4Mx18 configuration available.  On-chip delay-locked loop (DLL) for wide data valid window.  Common I/O read and write ports.  Synchronous pipeline read with self-timed l
Integrated Silicon Solution
Integrated Silicon Solution
datasheet IS61DDB22M36A pdf


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