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Datasheet CD4517BMS Equivalent ( PDF ) - CMOS |
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| CD4517BMS | CMOS Dual 64-Stage Static Shift Register CD4517BMS
December 1992
CMOS Dual 64-Stage Static Shift Register
Description
CD4517BMS dual 64-stage static shift register consists of two independent registers each having a clock, data, and write enable input and outputs accessible at taps following the 16th, 32rd, 48th, and 64th stages. These taps also serve as input points allowing data to be inputted at the 17th, 33rd, and 49th stages when t
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