Datasheet AT45DB642 Equivalent ( PDF )

Features Single 2.7V - 3.6V Supply Dual-interface Architecture Dedicated Serial Interface (SPI Modes 0 and 3 Compatible) Dedicated Parallel I, O Interface (Optional Use) Page Program Operation Single Cycle Reprogram (Erase and Program) 8192 Pages (1056 Bytes, Page) Main Memory Supports Page and Block Erase Operations Two 1056-byte SRAM Data Buffers Allows Receiving of Data while R

Features Single 2.7V - 3.6V Supply Dual-interface Architecture RapidS Serial Interface: 66MH- Maximum Clock Frequency SPI Compatible Modes 0 and 3 Rapid8 8-bit Interface: 50MH- Maximum Clock Frequency User Configurable Page Size 1024-Bytes per Page 1056-Bytes per Page Page Size Can Be Factory Pre-configured for 1024-Bytes Page Program Operation Intelligent Programming Operation 8192 Pag

Features Single 2.7V - 3.6V Supply Dual-interface Architecture RapidS Serial Interface: 66 MH- Maximum Clock Frequency SPI Compatible Modes 0 and 3 Rapid8 8-bit Interface: 50 MH- Maximum Clock Frequency User Configurable Page Size 1024 Bytes per Page 1056 Bytes per Page Page Size Can Be Factory Pre-configured for 1024 Bytes Page Program Operation Intelligent Programming Operation 8192 P