Datasheet AD779 Equivalent ( PDF )

a FEATURES AC and DC Characterized and Specified (K, B, T Grades) 128k Conversions per Second 1 MH- Full Power Bandwidth 500 kH- Full Linear Bandwidth 80 dB S, N+D (K, B, T Grades) Twos Complement Data Format (Bipolar Mode) Straight Binary Data Format (Unipolar Mode) 10 M Input Impedance 16-Bit Bus Interface (See AD679 for 8-Bit Interface) Onboard Reference and Clock 10 V Unipolar or Bipolar Input

Data Sheet FEATURES Power Supply: 2.5 V to 5.25 V operation Normal: 75 μA maximum Power-down: 1 μA maximum RMS noise: 1.1 μV at 9.5 H- update rate 16-bit p-p resolution Integral nonlinearity: 3.5 ppm typical Simultaneous 50 H- and 60 H- rejection Internal clock oscillator Programmable gain amplifier Rail-to-rail input buffer VDD monitor channel Temperature range: 40°C to +105°C 10-lead MSOP

Data Sheet FEATURES Power Supply: 2.5 V to 5.25 V operation Normal: 75 μA max Power-down: 1 μA max RMS noise: 1.1 μV at 9.5 H- update rate 19.5-bit p-p resolution (22 bits effective resolution) Integral nonlinearity: 3.5 ppm typical Simultaneous 50 H- and 60 H- rejection Internal clock oscillator Rail-to-rail input buffer VDD monitor channel Temperature range: 40°C to +105°C 10-lead MSOP INT

Preliminary Technical Data FEATURES Resolution: Low Power, 16, 24-Bit Sigma-Delta ADC with Low-Noise In-Amp and Embedded Reference AD7792, AD7793 GND VBIAS VDD BANDGAP REFERENCE AVDD REFIN(+), AIN3(+) REFIN(-), AIN3(-) GND SIGMA DELTA ADC SERIAL INTERFACE AND CONTROL LOGIC DOUT, RDY DIN SCLK CS AIN1(+) AIN1(-) AIN2(+) AIN2(-) VDD IOUT1 IOUT2 GND INTERNAL CLOCK MUX IN-AMP AD7792: 16-Bit AD7793:

Preliminary Technical Data FEATURES Resolution: Low Power, 16, 24-Bit Sigma-Delta ADC with Low-Noise In-Amp and Embedded Reference AD7792, AD7793 GND VBIAS VDD BANDGAP REFERENCE AVDD REFIN(+), AIN3(+) REFIN(-), AIN3(-) GND SIGMA DELTA ADC SERIAL INTERFACE AND CONTROL LOGIC DOUT, RDY DIN SCLK CS AIN1(+) AIN1(-) AIN2(+) AIN2(-) VDD IOUT1 IOUT2 GND INTERNAL CLOCK MUX IN-AMP AD7792: 16-Bit AD7793: