Datasheet 74S473 Equivalent ( PDF )

N.º	Número de pieza	Descripción	Fabricantes	PDF
1	74S473	DM74S473 DM74S473 (512 x 8) 4096-Bit TTL PROM November 1990 DM74S473 (512 x 8) 4096-Bit TTL PROM General Description This Schottky memory is organized in the popular 512 words by 8 bits configuration A memory enable input is provided to control the output states When the device is enabled the outputs repre	National Semiconductor

74S Datasheet ( Hoja de datos ) - resultados coincidentes

Número de pieza	Descripción	Fabricantes	PDF
74S04	HEX INVERTING GATES DM54S04 DM74S04 Hex Inverting Gates DM54S04 DM74S04 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function Connection Diagram Dual-In-Line Package June 1989 TL F 6442 – 1 Order Number DM54S04J DM54S	National Semiconductor
74S08	Quad 2-Input AND Gate DM74S08 Quad 2-Input AND Gate March 1996 Revised April 2000 DM74S08 Quad 2-Input AND Gate General Description This device contains four independent gates each of which performs the logic AND function. Ordering Code: Order Number Package Number Package Description DM74S08N	Fairchild Semiconductor
74S00	QUAD 2-input NAND GATE	ETC

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Número de pieza	Descripción	Fabricantes	PDF
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