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Datasheet 74LVX373 Equivalent ( PDF ) - Latch |
| N.º | Número de pieza | Descripción | Fabricantes | Comprar ahora |
| 1 | 74LVX373 | Low Voltage Octal Transparent Latch with 3-STATE Outputs 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
June 1993 Revised March 1999
74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
General Description
The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data satisfying the input
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 Fairchild Semiconductor |
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| 2 | 74LVX373 | LOW VOLTAGE CMOS OCTAL D-TYPE LATCH 74LVX373
LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS
s HIGH SPEED:
tPD=5.8ns (TYP.) at VCC = 3.3V s 5V TOLERANT INPUTS
s POWER-DOWN PROTECTION ON INPUTS
s INPUT VOLTAGE LEVEL:
)VIL = 0.8V, VIH = 2V at VCC =3V t(ss LOW POWER DISSIPATION: cICC = 4 A (MAX.) at TA=25°C us LOW NOISE: dVOLP = 0.3V (TYP.) at VCC =3.3V ros SYMMETRICAL OUTPUT IMPEDANCE: P|IOH| = IOL
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 STMicroelectronics |
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| 3 | 74LVX373M | Low Voltage Octal Transparent Latch with 3-STATE Outputs 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
June 1993 Revised March 1999
74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
General Description
The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data satisfying the input
|
Fairchild Semiconductor |
|
| 4 | 74LVX373MTC | Low Voltage Octal Transparent Latch with 3-STATE Outputs 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
June 1993 Revised March 1999
74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
General Description
The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data satisfying the input
|
Fairchild Semiconductor |
|
| 5 | 74LVX373SJ | Low Voltage Octal Transparent Latch with 3-STATE Outputs 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
June 1993 Revised March 1999
74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
General Description
The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data satisfying the input
|
Fairchild Semiconductor |
|
74L Datasheet ( Hoja de datos ) - resultados coincidentes |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 1 | 74L74 | Dual Positive Edge Triggered D Flip-Flop
|  National Semiconductor |
 |
| 2 | 74LCX00 | Low Voltage Quad 2-Input NAND Gate
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
- 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input
| Fairchild Semiconductor |
|
| 3 | 74LCX00 | Low voltage CMOS QUAD 2-Input NAND gate
74LCX00
Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs
Datasheet production data
Features
- 5 V tolerant inputs - High speed
tPD = 4.3 ns (max.) at VCC = 3 V - Power-down protection on inputs and outputs - Symmetrical output impedance
|IOH| = IOL = 24 mA (min.) at VCC = 3
|  ST Microelectronics |
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| 4 | 74LCX00M | Low Voltage Quad 2-Input NAND Gate
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
- 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input
| Fairchild Semiconductor |
|
| 5 | 74LCX00MTC | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995 Revised March 1999
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys
| Fairchild Semiconductor |
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| 6 | 74LCX00MTCX | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995 Revised March 1999
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys
| Fairchild Semiconductor |
|
| 7 | 74LCX00SJ | Low Voltage Quad 2-Input NAND Gate
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
- 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input
| Fairchild Semiconductor |
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