Datasheet 74LVT573PWDH Equivalent ( PDF ) - Latch

INTEGRATED CIRCUITS 74LVT573 3.3V Octal D-type transparent latch (3-State) Product specification Supersedes data of 1995 Nov 14 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Philips Semiconductors Product specification 3.3V Octal D-type transparent latch (3-State) 74LVT573 FEATURES Inputs and outputs on opposite side of package allow easy interface to microprocessors DESCRIPTION

The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00 device is a low-voltage CMOS quad dual input NAND gate manufactured with sub-micron silicon gate and double layer metal wiring C2MOS technology. It is ideal for low-power and high-speed 3.3 V applications and can be interfaced to a 5 V signal environment for inputs.

The 74LCX00M contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation..

The 74LCX00MTC contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00MTCX contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00SJ contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.