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Datasheet 74LVT373 Equivalent ( PDF ) - Latch |
| N.º | Número de pieza | Descripción | Fabricantes | Comprar ahora |
| 1 | 74LVT373 | 3.3 Volt ABT octal transparent latch 3-State Philips Semiconductors Low Voltage Products
Objective specification
3.3 Volt ABT octal transparent latch (3 State)
74LVT373
FEATURES
Designed for use in the 3.3V
high performance market
Latch up protection exceeds 500mA per
JEDEC JC40.2 Std 17
independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enab
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 NXP Semiconductors |
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| 2 | 74LVT373 | Low Voltage Octal Transparent Latch with 3-STATE Outputs 74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
September 1999 Revised October 1999
74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
General Description
The LVT373 and LVTH373 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When
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 Fairchild Semiconductor |
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| 3 | 74LVT373 | Low Voltage Octal Transparent Latch with 3-STATE Outputs 74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
September 1999 Revised October 1999
74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs
General Description
The LVT373 and LVTH373 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When
|
Fairchild Semiconductor |
|
| 4 | 74LVT373 | 3.3 Volt ABT octal transparent latch 3-State Philips Semiconductors Low Voltage Products
Objective specification
3.3 Volt ABT octal transparent latch (3 State)
74LVT373
FEATURES
Designed for use in the 3.3V
high performance market
Latch up protection exceeds 500mA per
JEDEC JC40.2 Std 17
independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enab
|
NXP Semiconductors |
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| 5 | 74LVT373D | 3.3 Volt ABT octal transparent latch 3-State Philips Semiconductors Low Voltage Products
Objective specification
3.3 Volt ABT octal transparent latch (3 State)
74LVT373
FEATURES
Designed for use in the 3.3V
high performance market
Latch up protection exceeds 500mA per
JEDEC JC40.2 Std 17
independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enab
|
NXP Semiconductors |
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74L Datasheet ( Hoja de datos ) - resultados coincidentes |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 1 | 74L74 | Dual Positive Edge Triggered D Flip-Flop
|  National Semiconductor |
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| 2 | 74LCX00 | Low Voltage Quad 2-Input NAND Gate
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
- 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input
| Fairchild Semiconductor |
|
| 3 | 74LCX00 | Low voltage CMOS QUAD 2-Input NAND gate
74LCX00
Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs
Datasheet production data
Features
- 5 V tolerant inputs - High speed
tPD = 4.3 ns (max.) at VCC = 3 V - Power-down protection on inputs and outputs - Symmetrical output impedance
|IOH| = IOL = 24 mA (min.) at VCC = 3
|  ST Microelectronics |
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| 4 | 74LCX00M | Low Voltage Quad 2-Input NAND Gate
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
- 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input
| Fairchild Semiconductor |
|
| 5 | 74LCX00MTC | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995 Revised March 1999
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys
| Fairchild Semiconductor |
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| 6 | 74LCX00MTCX | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995 Revised March 1999
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys
| Fairchild Semiconductor |
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| 7 | 74LCX00SJ | Low Voltage Quad 2-Input NAND Gate
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
- 5V tolerant inputs - 2.3V 3.6V VCC specifications provided - 5.2ns tPD max. (VCC = 3.3V), 10 A ICC max. - Power down high impedance input
| Fairchild Semiconductor |
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