Datasheet 74LVT373 Equivalent ( PDF ) - Latch

Philips Semiconductors Low Voltage Products Objective specification 3.3 Volt ABT octal transparent latch (3 State) 74LVT373 FEATURES Designed for use in the 3.3V high performance market Latch up protection exceeds 500mA per JEDEC JC40.2 Std 17 independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enab

74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs September 1999 Revised October 1999 74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT373 and LVTH373 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When

74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs September 1999 Revised October 1999 74LVT373 74LVTH373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT373 and LVTH373 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When

Philips Semiconductors Low Voltage Products Objective specification 3.3 Volt ABT octal transparent latch (3 State) 74LVT373 FEATURES Designed for use in the 3.3V high performance market Latch up protection exceeds 500mA per JEDEC JC40.2 Std 17 independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enab

Philips Semiconductors Low Voltage Products Objective specification 3.3 Volt ABT octal transparent latch (3 State) 74LVT373 FEATURES Designed for use in the 3.3V high performance market Latch up protection exceeds 500mA per JEDEC JC40.2 Std 17 independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enab

The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00 device is a low-voltage CMOS quad dual input NAND gate manufactured with sub-micron silicon gate and double layer metal wiring C2MOS technology. It is ideal for low-power and high-speed 3.3 V applications and can be interfaced to a 5 V signal environment for inputs.

The 74LCX00M contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation..

The 74LCX00MTC contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00MTCX contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00SJ contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.