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Datasheet 74LVC2G02 Equivalent ( PDF ) - Gate |
| P/N | Descripción | Fabr. | |
| 74LVC2G02 | Dual 2-input NOR gate INTEGRATED CIRCUITS
DATA SHEET
74LVC2G02 Dual 2-input NOR gate
Product speci cation Supersedes data of 2003 Oct 15 2004 Sep 15
Philips Semiconductors
Product speci cation
Dual 2-input NOR gate
FEATURES Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant outputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.
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| Dual 2-input NOR gate 74LVC2G02
Dual 2-input NOR gate
Rev. 11 8 April 2013
Product data sheet
1. General description
The 74LVC2G02 provides a 2-input NOR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
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| DUAL 2-INPUT NOR GATE NEW PRODUCT
74LVC2G02
DUAL 2-INPUT NOR GATE
Description
Pin Assignments
The 74LVC2G02 is a dual, two input NOR gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when the device is pow
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| DUAL 2-INPUT POSITIVE-NOR GATE UNISONIC TECHNOLOGIES CO., LTD U74LVC2G02
DUAL 2-INPUT POSITIVE-NOR GATE
DESCRIPTION
The UTC U74LVC2G02 is a dual 2-input positive-NOR gate
which provides the function Y=A+B or Y=A+B . This device has power-down protective circuit, preventing device
destruction when it is powered down.
FEATURES
* Operation Voltage Range: 1.65~5.5V * Low Power Dissipation: ICC=10μA(Max) * High Speed: tpd=4.9
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| 74LVC2G02-Q100 | Dual 2-input NOR gate 74LVC2G02-Q100
Dual 2-input NOR gate
Rev. 1 26 February 2013
Product data sheet
1. General description
The 74LVC2G02-Q100 provides a 2-input NOR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The I
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| P/N | Descripción | Fabr. | |
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