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Datasheet 74LS51 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 2 | 74LS51 | Dual 2-Wide 2-Input/ 2-Wide 3-Input AND-OR-INVERT Gate DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate
August 1986 Revised March 2000
DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate
General Description
This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Eac |
 Fairchild Semiconductor |
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| 1 | 74LS51 | 2-wide 2-input/ 2-wide 3-input AND-OR-INVERT Gates Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.10
Hitachi Code JEDEC EIAJ Weight (reference value)
DP-14 Conforms Conforms 0.97 g
Unit: mm
10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 |
 Hitachi Semiconductor |
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