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Datasheet 74LS37 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 19 | 74LS37 | Quadruple 2-input Positive NAND Buffers Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.10
Hitachi Code JEDEC EIAJ Weight (reference value)
DP-14 Conforms Conforms 0.97 g
Unit: mm
10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 |
 Hitachi Semiconductor |
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| 18 | 74LS37 | 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
April 1986 Revised March 2000
DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole 3-STATE outputs d |
 Fairchild Semiconductor |
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| 17 | 74LS37 | TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
May 1992
DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole TR |
 National Semiconductor |
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| 16 | 74LS373 | TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
May 1992
DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole TR |
National Semiconductor |
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