Datasheet 74LS27 Equivalent ( PDF ) - Gate

Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7.80 0.30 1.15 0° 8° + 0.20 1.42 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10

SN74LS273 Octal D Flip-Flop with Clear The SN74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch lead spacing. http:, , onsemi.com 8-Bit High Speed Register Parallel Register Common Clock and Master Reset Input Clamp Diodes Limi

DM74LS273 8-Bit Register with Clear October 1988 Revised March 2000 DM74LS273 8-Bit Register with Clear General Description The DM74LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch row spacing. Features s Edge-triggered s 8-bit high speed reg

Unit: mm 24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89 1.27 Max 10 1.30 2.54 Min 5.08 Max 7.62 0.51 Min 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° + 0.11 Hitachi Code JEDEC EIAJ Weight (reference value) DP-20N Conforms 1.26 g Unit: mm 12.6 13 Max 20 11 1 10 5.5 0.80 Max 2.20 Max *0.22 ± 0.05 0.20 ± 0.04 0.20 7.80 + 0.30 1.15 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0