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Descripción |
Fabr. |
PDF |
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74LS155 |
DUAL 1-OF-4 DECODER/ DEMULTIPLEXER
DUAL 1-OF-4 DECODER, DEMULTIPLEXER
The SN54 , 74LS155 and SN54 , 74LS156 are high speed Dual 1-of-4 Decoder, Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enable inputs. If the Enable functions are satisfied, on
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Dual 2-Line to 4-Line Decoders/Demultiplexers
DM74LS155 DM74LS156 Dual 2-Line to 4-Line Decoders, Demultiplexers
August 1986 Revised April 2000
DM74LS155 DM74LS156 Dual 2-Line to 4-Line Decoders, Demultiplexers
General Description
These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common addr
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Dual 2-line-to-4-line Decoders/Demultiplexers
19.20 20.00 Max 16 9 7.40 Max 6.30
Unit: mm
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25 0.05 0° 15°
Hitachi Code JEDEC EIAJ Weight (reference value)
+ 0.13
DP-16 Conforms Conforms 1.07 g
Unit: mm
10.06 10.5 Max 16 9
5.5
1
*0.22 ± 0.05 0.20 ± 0.04
8 0.80 Max
2.20 Max
0.20 7.80 + 0.30
1.15 0° 8° 0.70 ± 0.20
1.27 *0.42 ± 0.08 0.40 ± 0
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DUAL 1-OF-4 DECODER/ DEMULTIPLEXER
DUAL 1-OF-4 DECODER, DEMULTIPLEXER
The SN54 , 74LS155 and SN54 , 74LS156 are high speed Dual 1-of-4 Decoder, Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enable inputs. If the Enable functions are satisfied, on
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Dual 2-Line to 4-Line Decoders/Demultiplexers
54LS155 DM54LS155 DM74LS155 54LS156 DM54LS156 DM74LS156 Dual 2-Line to 4-Line Decoders Demultiplexers
June 1989
54LS155 DM54LS155 DM74LS155 54LS156 DM54LS156 DM74LS156 Dual 2-Line to 4-Line Decoders Demultiplexers
General Description
These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package When both sectio
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