Datasheet 74LS09 Equivalent ( PDF ) - Gate

DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs August 1986 Revised March 2000 DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic AND function. The open-collector outputs require external pull-up resistors for proper logical operation. Pull-Up Resistor Equations Where: N1 (IOH

Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 0.05 0° 15° + 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7.80 0.30 1.15 0° 8° + 0.20 1.42 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10

SN54, 74LS09 QUAD 2-INPUT AND GATE QUAD 2-INPUT AND GATE VCC 14 13 12 * 11 10 9 * 8 LOW POWER SCHOTTKY * 1 2 3 4 5 6 * 7 GND 14 1 J SUFFIX CERAMIC CASE 632-08 * OPEN COLLECTOR OUTPUTS 14 1 N SUFFIX PLASTIC CASE 646-06 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD Ceramic Plastic SOIC GUARANTEED OPERATING RANGES Symbol VCC TA VOH IOL Supply Voltage O