Datasheet 74F64 Equivalent ( PDF ) - Gate

INTEGRATED CIRCUITS 74F64 4-2-3-2-input AND-OR-invert gate Product specification IC15 Data Handbook 1996 Mar 14 Philips Semiconductors Philips Semiconductors Product specification 4-2-3-2-input AND-OR-invert gate 74F64 TYPE 74F64 TYPICAL PROPAGATION DELAY 4.0ns TYPICAL SUPPLY CURRENT (TOTAL) 2.5mA PIN CONFIGURATION Dc Da Db 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC Dd De Df Dk Dj Q ORDERING

74F64 4-2-3-2-Input AND-OR-Invert Gate April 1988 Revised March 1999 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: Order Number 74F64SC 74F64SJ 74F64PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14

54F 74F64 4-2-3-2-Input AND-OR-Invert Gate November 1994 54F 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function Commercial 74F64PC Military Package Number N14A Package Description 14-Lead (0 300 Wide) Molded Dual-In-Line 14-Lead Ceramic Dual-In-Line 14-Lead (0 150 Wide) Molded Small Outline JEDEC

INTEGRATED CIRCUITS 74F640 Octal bus transceiver, inverting (3-State) Product specification IC15 Data Handbook 1989 Nov 27 Philips Semiconductors Philips Semiconductors Product specification Octal bus transceiver, inverting (3-State) 74F640 FEATURES High-impedance NPN base inputs for reduced loading (70 A in High and Low states) bus loading PIN CONFIGURATION T, R 1 A0 A1 A2 A3 A4 A5 A6 2